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author | Ben Skeggs <bskeggs@redhat.com> | 2012-11-22 12:18:57 +1000 |
---|---|---|
committer | Ben Skeggs <bskeggs@redhat.com> | 2012-11-29 09:58:01 +1000 |
commit | 27abc13e47d7366bf87d6f9c61b118de27ab48da (patch) | |
tree | 293193ec004a8a7372ffb876ad68742e4d50f53e /drivers/gpu/drm/nouveau/core/engine/crypt | |
parent | e3aaa946bd7d0073bd338c159778015ed32ecb5b (diff) | |
download | op-kernel-dev-27abc13e47d7366bf87d6f9c61b118de27ab48da.zip op-kernel-dev-27abc13e47d7366bf87d6f9c61b118de27ab48da.tar.gz |
drm/nv98/crypt: use nouveau_falcon base class
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/core/engine/crypt')
-rw-r--r-- | drivers/gpu/drm/nouveau/core/engine/crypt/nv84.c | 27 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/core/engine/crypt/nv98.c | 64 |
2 files changed, 35 insertions, 56 deletions
diff --git a/drivers/gpu/drm/nouveau/core/engine/crypt/nv84.c b/drivers/gpu/drm/nouveau/core/engine/crypt/nv84.c index 1d85e5b..10d12ad 100644 --- a/drivers/gpu/drm/nouveau/core/engine/crypt/nv84.c +++ b/drivers/gpu/drm/nouveau/core/engine/crypt/nv84.c @@ -34,11 +34,11 @@ #include <engine/crypt.h> struct nv84_crypt_priv { - struct nouveau_crypt base; + struct nouveau_engine base; }; struct nv84_crypt_chan { - struct nouveau_crypt_chan base; + struct nouveau_engctx base; }; /******************************************************************************* @@ -96,8 +96,8 @@ nv84_crypt_context_ctor(struct nouveau_object *parent, struct nv84_crypt_chan *priv; int ret; - ret = nouveau_crypt_context_create(parent, engine, oclass, NULL, 256, - 0, NVOBJ_FLAG_ZERO_ALLOC, &priv); + ret = nouveau_engctx_create(parent, engine, oclass, NULL, 256, + 0, NVOBJ_FLAG_ZERO_ALLOC, &priv); *pobject = nv_object(priv); if (ret) return ret; @@ -110,11 +110,11 @@ nv84_crypt_cclass = { .handle = NV_ENGCTX(CRYPT, 0x84), .ofuncs = &(struct nouveau_ofuncs) { .ctor = nv84_crypt_context_ctor, - .dtor = _nouveau_crypt_context_dtor, - .init = _nouveau_crypt_context_init, - .fini = _nouveau_crypt_context_fini, - .rd32 = _nouveau_crypt_context_rd32, - .wr32 = _nouveau_crypt_context_wr32, + .dtor = _nouveau_engctx_dtor, + .init = _nouveau_engctx_init, + .fini = _nouveau_engctx_fini, + .rd32 = _nouveau_engctx_rd32, + .wr32 = _nouveau_engctx_wr32, }, }; @@ -176,7 +176,8 @@ nv84_crypt_ctor(struct nouveau_object *parent, struct nouveau_object *engine, struct nv84_crypt_priv *priv; int ret; - ret = nouveau_crypt_create(parent, engine, oclass, &priv); + ret = nouveau_engine_create(parent, engine, oclass, true, + "PCRYPT", "crypt", &priv); *pobject = nv_object(priv); if (ret) return ret; @@ -195,7 +196,7 @@ nv84_crypt_init(struct nouveau_object *object) struct nv84_crypt_priv *priv = (void *)object; int ret; - ret = nouveau_crypt_init(&priv->base); + ret = nouveau_engine_init(&priv->base); if (ret) return ret; @@ -210,8 +211,8 @@ nv84_crypt_oclass = { .handle = NV_ENGINE(CRYPT, 0x84), .ofuncs = &(struct nouveau_ofuncs) { .ctor = nv84_crypt_ctor, - .dtor = _nouveau_crypt_dtor, + .dtor = _nouveau_engine_dtor, .init = nv84_crypt_init, - .fini = _nouveau_crypt_fini, + .fini = _nouveau_engine_fini, }, }; diff --git a/drivers/gpu/drm/nouveau/core/engine/crypt/nv98.c b/drivers/gpu/drm/nouveau/core/engine/crypt/nv98.c index 9e3876c..0912b79 100644 --- a/drivers/gpu/drm/nouveau/core/engine/crypt/nv98.c +++ b/drivers/gpu/drm/nouveau/core/engine/crypt/nv98.c @@ -26,6 +26,7 @@ #include <core/enum.h> #include <core/class.h> #include <core/engctx.h> +#include <core/falcon.h> #include <subdev/timer.h> #include <subdev/fb.h> @@ -36,11 +37,11 @@ #include "fuc/nv98.fuc.h" struct nv98_crypt_priv { - struct nouveau_crypt base; + struct nouveau_falcon base; }; struct nv98_crypt_chan { - struct nouveau_crypt_chan base; + struct nouveau_falcon_chan base; }; /******************************************************************************* @@ -66,8 +67,8 @@ nv98_crypt_context_ctor(struct nouveau_object *parent, struct nv98_crypt_chan *priv; int ret; - ret = nouveau_crypt_context_create(parent, engine, oclass, NULL, 256, - 256, NVOBJ_FLAG_ZERO_ALLOC, &priv); + ret = nouveau_falcon_context_create(parent, engine, oclass, NULL, 256, + 256, NVOBJ_FLAG_ZERO_ALLOC, &priv); *pobject = nv_object(priv); if (ret) return ret; @@ -80,11 +81,11 @@ nv98_crypt_cclass = { .handle = NV_ENGCTX(CRYPT, 0x98), .ofuncs = &(struct nouveau_ofuncs) { .ctor = nv98_crypt_context_ctor, - .dtor = _nouveau_crypt_context_dtor, - .init = _nouveau_crypt_context_init, - .fini = _nouveau_crypt_context_fini, - .rd32 = _nouveau_crypt_context_rd32, - .wr32 = _nouveau_crypt_context_wr32, + .dtor = _nouveau_falcon_context_dtor, + .init = _nouveau_falcon_context_init, + .fini = _nouveau_falcon_context_fini, + .rd32 = _nouveau_falcon_context_rd32, + .wr32 = _nouveau_falcon_context_wr32, }, }; @@ -153,7 +154,8 @@ nv98_crypt_ctor(struct nouveau_object *parent, struct nouveau_object *engine, struct nv98_crypt_priv *priv; int ret; - ret = nouveau_crypt_create(parent, engine, oclass, &priv); + ret = nouveau_falcon_create(parent, engine, oclass, 0x087000, true, + "PCRYPT", "crypt", &priv); *pobject = nv_object(priv); if (ret) return ret; @@ -163,36 +165,10 @@ nv98_crypt_ctor(struct nouveau_object *parent, struct nouveau_object *engine, nv_engine(priv)->cclass = &nv98_crypt_cclass; nv_engine(priv)->sclass = nv98_crypt_sclass; nv_engine(priv)->tlb_flush = nv98_crypt_tlb_flush; - return 0; -} - -static int -nv98_crypt_init(struct nouveau_object *object) -{ - struct nv98_crypt_priv *priv = (void *)object; - int ret, i; - - ret = nouveau_crypt_init(&priv->base); - if (ret) - return ret; - - /* wait for exit interrupt to signal */ - nv_wait(priv, 0x087008, 0x00000010, 0x00000010); - nv_wr32(priv, 0x087004, 0x00000010); - - /* upload microcode code and data segments */ - nv_wr32(priv, 0x087ff8, 0x00100000); - for (i = 0; i < ARRAY_SIZE(nv98_pcrypt_code); i++) - nv_wr32(priv, 0x087ff4, nv98_pcrypt_code[i]); - - nv_wr32(priv, 0x087ff8, 0x00000000); - for (i = 0; i < ARRAY_SIZE(nv98_pcrypt_data); i++) - nv_wr32(priv, 0x087ff4, nv98_pcrypt_data[i]); - - /* start it running */ - nv_wr32(priv, 0x08710c, 0x00000000); - nv_wr32(priv, 0x087104, 0x00000000); /* ENTRY */ - nv_wr32(priv, 0x087100, 0x00000002); /* TRIGGER */ + nv_falcon(priv)->code.data = nv98_pcrypt_code; + nv_falcon(priv)->code.size = sizeof(nv98_pcrypt_code); + nv_falcon(priv)->data.data = nv98_pcrypt_data; + nv_falcon(priv)->data.size = sizeof(nv98_pcrypt_data); return 0; } @@ -201,8 +177,10 @@ nv98_crypt_oclass = { .handle = NV_ENGINE(CRYPT, 0x98), .ofuncs = &(struct nouveau_ofuncs) { .ctor = nv98_crypt_ctor, - .dtor = _nouveau_crypt_dtor, - .init = nv98_crypt_init, - .fini = _nouveau_crypt_fini, + .dtor = _nouveau_falcon_dtor, + .init = _nouveau_falcon_init, + .fini = _nouveau_falcon_fini, + .rd32 = _nouveau_falcon_rd32, + .wr32 = _nouveau_falcon_wr32, }, }; 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