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author | Archit Taneja <architt@codeaurora.org> | 2017-10-27 16:27:30 +0530 |
---|---|---|
committer | Rob Clark <robdclark@gmail.com> | 2017-10-28 14:02:58 -0400 |
commit | b14892801078085cb54dcbe3389057e12c1746a2 (patch) | |
tree | 6919e77760875f57b8e3817f23513646d4658209 /drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c | |
parent | 9866601e67adc5589302d7dfe12d8325d5b894f8 (diff) | |
download | op-kernel-dev-b14892801078085cb54dcbe3389057e12c1746a2.zip op-kernel-dev-b14892801078085cb54dcbe3389057e12c1746a2.tar.gz |
drm/msm/mdp5: Update mdp5_pipe_assign to spit out both planes
We currently call mdp5_pipe_assign() twice to assign the left and right
hwpipes for our drm_plane. When merging 2 hwpipes, there are a few
constraints that we need to keep in mind:
- Only the same types of SSPPs are preferred. I.e, a RGB pipe should
be paired with another RGB pipe, VIG with VIG etc.
- The hwpipe staged on the left should have a higher priority than
the hwpipe staged on the right. The priorities are as follows:
VIG0 > VIG1 > VIG2 > VIG3
RGB0 > RGB1 > RGB2 > RGB3
DMA0 > DMA1
We can't apply these constraints easily if mdp5_pipe_assign() is
called twice. Update mdp5_pipe_assign() to find both hwpipes in
one go, and add the extra constraints needed.
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Diffstat (limited to 'drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c')
-rw-r--r-- | drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c | 25 |
1 files changed, 12 insertions, 13 deletions
diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c index aec115e..f1cf367 100644 --- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c +++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c @@ -393,31 +393,30 @@ static int mdp5_plane_atomic_check_with_state(struct drm_crtc_state *crtc_state, struct mdp5_hw_pipe *old_hwpipe = mdp5_state->hwpipe; struct mdp5_hw_pipe *old_right_hwpipe = mdp5_state->r_hwpipe; + struct mdp5_hw_pipe *new_hwpipe = NULL; + struct mdp5_hw_pipe *new_right_hwpipe = NULL; ret = mdp5_pipe_assign(state->state, plane, caps, - blkcfg, &mdp5_state->hwpipe); + blkcfg, &new_hwpipe, + need_right_hwpipe ? + &new_right_hwpipe : NULL); if (ret) { - DBG("%s: failed to assign hwpipe!", plane->name); + DBG("%s: failed to assign hwpipe(s)!", + plane->name); return ret; } - if (need_right_hwpipe) { - ret = mdp5_pipe_assign(state->state, plane, - caps, blkcfg, - &mdp5_state->r_hwpipe); - if (ret) { - DBG("%s: failed to assign right hwpipe", - plane->name); - return ret; - } - } else { + mdp5_state->hwpipe = new_hwpipe; + if (need_right_hwpipe) + mdp5_state->r_hwpipe = new_right_hwpipe; + else /* * set it to NULL so that the driver knows we * don't have a right hwpipe when committing a * new state */ mdp5_state->r_hwpipe = NULL; - } + mdp5_pipe_release(state->state, old_hwpipe); mdp5_pipe_release(state->state, old_right_hwpipe); |