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authorBibby Hsieh <bibby.hsieh@mediatek.com>2016-07-28 10:22:55 +0800
committerPhilipp Zabel <p.zabel@pengutronix.de>2016-08-11 10:52:23 +0200
commit7216436420414144646f5d8343d061355fd23483 (patch)
tree2c165aea9b4c7272e46114182f2d85412acd643d /drivers/gpu/drm/mediatek/mtk_drm_crtc.h
parent2f3f4dda747c0619594d13996e65598ab675c60c (diff)
downloadop-kernel-dev-7216436420414144646f5d8343d061355fd23483.zip
op-kernel-dev-7216436420414144646f5d8343d061355fd23483.tar.gz
drm/mediatek: set mt8173 dithering function
Some panels only accept bpc (bit per color) 6-bit. But, the default bpc in mt8173 display data path is 8-bit. If we didn't enable dithering function to convert bpc, display cannot show the smooth grayscale image. In mt8173, the dithering function in OD (OverDrive) and GAMMA module, we have to config them with connector->display_mode.bpc when CRTC initial. 1. Clear the default value at *_DITHER_5 and *_DITHER_7 register. 2. Calculate the LSB_ERR_SHIFT bits and ADD_LSHIFT bits two values. i.e. Input bpc of OD is 10 bits, we assume the bpc of panel is 6-bit, so, we need to set 4-bit to LSB_ERR_SHIFT and ADD_LSHIFT bits respectively. 3. Then, set the OD or GAMMA to dithering mode depends on path-1 or path-2. Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Diffstat (limited to 'drivers/gpu/drm/mediatek/mtk_drm_crtc.h')
-rw-r--r--drivers/gpu/drm/mediatek/mtk_drm_crtc.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.h b/drivers/gpu/drm/mediatek/mtk_drm_crtc.h
index d332564..33f6ab6 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.h
+++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.h
@@ -20,6 +20,8 @@
#define OVL_LAYER_NR 4
#define MTK_LUT_SIZE 512
+#define MTK_MAX_BPC 10
+#define MTK_MIN_BPC 3
int mtk_drm_crtc_enable_vblank(struct drm_device *drm, unsigned int pipe);
void mtk_drm_crtc_disable_vblank(struct drm_device *drm, unsigned int pipe);
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