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author | Shobhit Kumar <shobhit.kumar@intel.com> | 2014-07-03 16:35:40 +0530 |
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committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-07-09 09:51:53 +0200 |
commit | a799a9780eb5c874d9d7ca0bbee66401ca98c013 (patch) | |
tree | be2261c067a3e6024e2be318baa827b18c007c0b /drivers/gpu/drm/i915 | |
parent | d4967d8c6d4f52623f2be8eaff0b445dc5863c92 (diff) | |
download | op-kernel-dev-a799a9780eb5c874d9d7ca0bbee66401ca98c013.zip op-kernel-dev-a799a9780eb5c874d9d7ca0bbee66401ca98c013.tar.gz |
drm/i915/vlv: DPI FIFO empty check is not needed
While sending DPI SHUTDOWN command, we cannot wait for FIFO empty as
pipes are not disabled at that time. In case of MIPI we disable port
first and send SHUTDOWN command while pipe is still running and FIFOs
will not be empty, causing spurious error log
Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>
Tested-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915')
-rw-r--r-- | drivers/gpu/drm/i915/intel_dsi_cmd.c | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i915/intel_dsi_cmd.c b/drivers/gpu/drm/i915/intel_dsi_cmd.c index 3eeb21b..933c863 100644 --- a/drivers/gpu/drm/i915/intel_dsi_cmd.c +++ b/drivers/gpu/drm/i915/intel_dsi_cmd.c @@ -404,12 +404,6 @@ int dpi_send_cmd(struct intel_dsi *intel_dsi, u32 cmd, bool hs) else cmd |= DPI_LP_MODE; - /* DPI virtual channel?! */ - - mask = DPI_FIFO_EMPTY; - if (wait_for((I915_READ(MIPI_GEN_FIFO_STAT(pipe)) & mask) == mask, 50)) - DRM_ERROR("Timeout waiting for DPI FIFO empty.\n"); - /* clear bit */ I915_WRITE(MIPI_INTR_STAT(pipe), SPL_PKT_SENT_INTERRUPT); |