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author | Tvrtko Ursulin <tvrtko.ursulin@intel.com> | 2017-04-12 16:48:42 +0100 |
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committer | Tvrtko Ursulin <tvrtko.ursulin@intel.com> | 2017-04-28 08:58:15 +0100 |
commit | a3662830e1e120e9950072a48d75a61ed921ad4a (patch) | |
tree | 028f11125f4b5e4d5705fb70a7217930ce0cba93 /drivers/gpu/drm/i915/intel_uncore.c | |
parent | 3204c343bb691c42a5e568cbd2a9ec9b2b5703c0 (diff) | |
download | op-kernel-dev-a3662830e1e120e9950072a48d75a61ed921ad4a.zip op-kernel-dev-a3662830e1e120e9950072a48d75a61ed921ad4a.tar.gz |
drm/i915/guc: Fix sleep under spinlock during reset
Looks like intel_guc_reset had the ability to sleep under the
uncore spinlock since forever but it wasn't detected until the
recent changes annotated the wait for register with might_sleep.
I have fixed it by removing holding of the uncore spinlock over
the call to gen6_hw_domain_reset, since I do not see that is
really needed. But there is always a possibility I am missing
some nasty detail so please double check.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Oscar Mateo <oscar.mateo@intel.com>
Acked-by: Michel Thierry <michel.thierry@intel.com>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_uncore.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_uncore.c | 7 |
1 files changed, 1 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c index 0d479c0..07a722f 100644 --- a/drivers/gpu/drm/i915/intel_uncore.c +++ b/drivers/gpu/drm/i915/intel_uncore.c @@ -1532,7 +1532,7 @@ static int gen6_hw_domain_reset(struct drm_i915_private *dev_priv, */ __raw_i915_write32(dev_priv, GEN6_GDRST, hw_domain_mask); - /* Spin waiting for the device to ack the reset requests */ + /* Wait for the device to ack the reset requests */ return intel_wait_for_register_fw(dev_priv, GEN6_GDRST, hw_domain_mask, 0, 500); @@ -1779,17 +1779,12 @@ bool intel_has_gpu_reset(struct drm_i915_private *dev_priv) int intel_guc_reset(struct drm_i915_private *dev_priv) { int ret; - unsigned long irqflags; if (!HAS_GUC(dev_priv)) return -EINVAL; intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL); - spin_lock_irqsave(&dev_priv->uncore.lock, irqflags); - ret = gen6_hw_domain_reset(dev_priv, GEN9_GRDOM_GUC); - - spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL); return ret; |