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authorVille Syrjälä <ville.syrjala@linux.intel.com>2015-06-24 22:00:05 +0300
committerDaniel Vetter <daniel.vetter@ffwll.ch>2015-06-29 10:55:52 +0200
commit54f1b6e15db87722aa21035169ce811af9d971fd (patch)
treefde363f093a5fb1c470f115b93e33d4a8c8627d2 /drivers/gpu/drm/i915/intel_sprite.c
parent262cd2e154c29dc3a235f68cc91e13d8f48e8002 (diff)
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drm/i915: Compute display FIFO split dynamically for CHV
Consider which planes are active and compute the FIFO split based on the relative data rates. Since we only consider the pipe src width rather than the plane width when computing watermarks it seems best to do the same when computing the FIFO split as well. This means the only thing we actually have to consider for the FIFO splut is the bpp, and we can ignore the rest. I've just stuffed the logic into the watermark code for now. Eventually it'll need to move into the atomic update for the crtc. There's also one extra complication I've not yet considered; Some of the DSPARB registers contain bits related to multiple pipes. The registers are double buffered but apparently they update on the vblank of any active pipe. So doing the FIFO reconfiguration properly when multiple pipes are active is not going to be fun. But let's ignore that mess for now. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Clint Taylor <Clinton.A.Taylor@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_sprite.c')
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