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author | ling.ma@intel.com <ling.ma@intel.com> | 2009-06-25 10:59:22 +0800 |
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committer | Eric Anholt <eric@anholt.net> | 2009-07-01 11:20:44 -0700 |
commit | 6ff4fd05676bc5b5c930bef25901e489f7843660 (patch) | |
tree | 82a9e18779ffd332a6715f413cc8e5513ef7b667 /drivers/gpu/drm/i915/intel_sdvo_regs.h | |
parent | 7662c8bd6545c12ac7b2b39e4554c3ba34789c50 (diff) | |
download | op-kernel-dev-6ff4fd05676bc5b5c930bef25901e489f7843660.zip op-kernel-dev-6ff4fd05676bc5b5c930bef25901e489f7843660.tar.gz |
drm/i915: Set SSC frequency for 8xx chips correctly
All 8xx class chips have the 66/48 split, not just 855.
Signed-off-by: Ma Ling <ling.ma@intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_sdvo_regs.h')
0 files changed, 0 insertions, 0 deletions