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| author | Dave Airlie <airlied@gmail.com> | 2015-11-07 17:16:59 +1000 |
|---|---|---|
| committer | Dave Airlie <airlied@gmail.com> | 2015-11-07 17:16:59 +1000 |
| commit | 816d2206f0f9953ca854e4ff1a2749a5cbd62715 (patch) | |
| tree | 26b8a56c4656a8794911c31246061bfe05d9cd9b /drivers/gpu/drm/i915/intel_runtime_pm.c | |
| parent | d0baf9218cacd9dd606c75f9961f94172b16de12 (diff) | |
| parent | 1b0e3a049efe471c399674fd954500ce97438d30 (diff) | |
| download | op-kernel-dev-816d2206f0f9953ca854e4ff1a2749a5cbd62715.zip op-kernel-dev-816d2206f0f9953ca854e4ff1a2749a5cbd62715.tar.gz | |
Merge tag 'drm-intel-next-fixes-2015-11-06' of git://anongit.freedesktop.org/drm-intel into drm-next
Here's a handful of i915 fixes for drm-next/v4.4. Imre's commit alone
should address the remaining warnings galore you experienced on
Skylake. Almost all of the rest are also fixes against user or QA
reported bugs, with references.
* tag 'drm-intel-next-fixes-2015-11-06' of git://anongit.freedesktop.org/drm-intel:
drm/i915/skl: disable display side power well support for now
drm/i915: Extend DSL readout fix to BDW and SKL.
drm/i915: Do graphics device reset under forcewake
drm/i915: Skip fence installation for objects with rotated views (v4)
drm/i915: add quirk to enable backlight on Dell Chromebook 11 (2015)
drm/i915/skl: Prevent unclaimed register writes on skylake.
drm/i915: disable CPU PWM also on LPT/SPT backlight disable
drm/i915: Fix maxfifo watermark calc on vlv cursor planes
drm/i915: add hotplug activation period to hotplug update mask
Diffstat (limited to 'drivers/gpu/drm/i915/intel_runtime_pm.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_runtime_pm.c | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c index ec010ee..d89c1d0 100644 --- a/drivers/gpu/drm/i915/intel_runtime_pm.c +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c @@ -1811,6 +1811,21 @@ static struct i915_power_well bxt_power_wells[] = { } }; +static int +sanitize_disable_power_well_option(const struct drm_i915_private *dev_priv, + int disable_power_well) +{ + if (disable_power_well >= 0) + return !!disable_power_well; + + if (IS_SKYLAKE(dev_priv)) { + DRM_DEBUG_KMS("Disabling display power well support\n"); + return 0; + } + + return 1; +} + #define set_power_wells(power_domains, __power_wells) ({ \ (power_domains)->power_wells = (__power_wells); \ (power_domains)->power_well_count = ARRAY_SIZE(__power_wells); \ @@ -1827,6 +1842,9 @@ int intel_power_domains_init(struct drm_i915_private *dev_priv) { struct i915_power_domains *power_domains = &dev_priv->power_domains; + i915.disable_power_well = sanitize_disable_power_well_option(dev_priv, + i915.disable_power_well); + mutex_init(&power_domains->lock); /* |
