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| author | Matt Roper <matthew.d.roper@intel.com> | 2015-12-01 09:26:58 -0800 |
|---|---|---|
| committer | Matt Roper <matthew.d.roper@intel.com> | 2015-12-01 14:28:37 -0800 |
| commit | 18024199579882265653bfe9e2b1a3dcb5697cd9 (patch) | |
| tree | e8ae27199942f741432ae48087c774eafd04bdce /drivers/gpu/drm/i915/intel_runtime_pm.c | |
| parent | 7905df29b959cb657bd07be4e481a86844c98b51 (diff) | |
| download | op-kernel-dev-18024199579882265653bfe9e2b1a3dcb5697cd9.zip op-kernel-dev-18024199579882265653bfe9e2b1a3dcb5697cd9.tar.gz | |
drm/i915/bxt: Disable power well support
BXT power well support is not yet stable. Starting with patch
commit 9f836f9016ad5320e0c9230419d2102cf15a28aa
Author: Patrik Jakobsson <patrik.jakobsson@linux.intel.com>
Date: Mon Nov 16 16:20:01 2015 +0100
drm/i915/gen9: Turn DC handling into a power well
DPMS off operations may actually cause the entire system to powerdown or
reboot. Disable power well support for now until Broxton gets fixes
similar to what we have for SKL.
Cc: Imre Deak <imre.deak@intel.com>
Cc: Patrik Jakobsson <patrik.jakobsson@linux.intel.com>
References: http://lists.freedesktop.org/archives/intel-gfx/2015-November/081037.html
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1448990818-11005-1-git-send-email-matthew.d.roper@intel.com
Reviewed-by: Imre Deak <imre.deak@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_runtime_pm.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_runtime_pm.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c index 3fa43af..ab833ef 100644 --- a/drivers/gpu/drm/i915/intel_runtime_pm.c +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c @@ -1911,6 +1911,11 @@ sanitize_disable_power_well_option(const struct drm_i915_private *dev_priv, if (disable_power_well >= 0) return !!disable_power_well; + if (IS_BROXTON(dev_priv)) { + DRM_DEBUG_KMS("Disabling display power well support\n"); + return 0; + } + return 1; } |
