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| author | Imre Deak <imre.deak@intel.com> | 2017-06-29 18:37:00 +0300 |
|---|---|---|
| committer | Imre Deak <imre.deak@intel.com> | 2017-07-06 16:29:25 +0300 |
| commit | e8a3a2a3d7f7a194e0f0ad92c5dd636f908e7601 (patch) | |
| tree | cba164730e6d56816a6c805d3854ae3392f099e4 /drivers/gpu/drm/i915/intel_runtime_pm.c | |
| parent | edfda8e37ae9ec530434c3a014c8f0155a72acbd (diff) | |
| download | op-kernel-dev-e8a3a2a3d7f7a194e0f0ad92c5dd636f908e7601.zip op-kernel-dev-e8a3a2a3d7f7a194e0f0ad92c5dd636f908e7601.tar.gz | |
drm/i915/bxt, glk: Fix assert on conditions for DC9 enabling
What we want to assert based on the conditions required by Bspec is that
power well 2 is disabled, so no need to check for other power wells.
In addition we can only check if the driver's request is removed, the
actual state depends on whether the other request bits are set or not
(BIOS, KVMR, DEBUG). So check only the driver's request bit.
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1498750622-14023-4-git-send-email-imre.deak@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_runtime_pm.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_runtime_pm.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c index 8418879..1fc75e6 100644 --- a/drivers/gpu/drm/i915/intel_runtime_pm.c +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c @@ -549,7 +549,9 @@ static void assert_can_enable_dc9(struct drm_i915_private *dev_priv) "DC9 already programmed to be enabled.\n"); WARN_ONCE(I915_READ(DC_STATE_EN) & DC_STATE_EN_UPTO_DC5, "DC5 still not disabled to enable DC9.\n"); - WARN_ONCE(I915_READ(HSW_PWR_WELL_DRIVER), "Power well on.\n"); + WARN_ONCE(I915_READ(HSW_PWR_WELL_DRIVER) & + SKL_POWER_WELL_REQ(SKL_DISP_PW_2), + "Power well 2 on.\n"); WARN_ONCE(intel_irqs_enabled(dev_priv), "Interrupts not disabled yet.\n"); |
