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authorMika Kuoppala <mika.kuoppala@linux.intel.com>2015-12-07 18:29:45 +0200
committerJani Nikula <jani.nikula@intel.com>2015-12-08 16:03:06 +0200
commite7674b8c31717dd0c58b3a9493d43249722071eb (patch)
treea77d35d2439ac9b9031d9e06e5c2289d1dbeb26e /drivers/gpu/drm/i915/intel_pm.c
parent6686ece19f7446f0e29c77d9e0402e1d0ce10c48 (diff)
downloadop-kernel-dev-e7674b8c31717dd0c58b3a9493d43249722071eb.zip
op-kernel-dev-e7674b8c31717dd0c58b3a9493d43249722071eb.tar.gz
drm/i915/skl: Double RC6 WRL always on
WaRsDoubleRc6WrlWithCoarsePowerGating should be enabled for all Skylakes. Make it so. Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com> Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> Reviewed-by: Sagar Arun Kamble <sagar.a.kamble@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1449505785-20812-2-git-send-email-mika.kuoppala@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
-rw-r--r--drivers/gpu/drm/i915/intel_pm.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 7096c06..8598456 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4673,8 +4673,7 @@ static void gen9_enable_rc6(struct drm_device *dev)
/* 2b: Program RC6 thresholds.*/
/* WaRsDoubleRc6WrlWithCoarsePowerGating: Doubling WRL only when CPG is enabled */
- if (IS_SKYLAKE(dev) && !((IS_SKL_GT3(dev) || IS_SKL_GT4(dev)) &&
- IS_SKL_REVID(dev, 0, SKL_REVID_E0)))
+ if (IS_SKYLAKE(dev))
I915_WRITE(GEN6_RC6_WAKE_RATE_LIMIT, 108 << 16);
else
I915_WRITE(GEN6_RC6_WAKE_RATE_LIMIT, 54 << 16);
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