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author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-06-18 11:44:05 +0200 |
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committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-06-18 11:44:05 +0200 |
commit | 5d0cf3d6e07957502dae8602e2f96eb6790ddc13 (patch) | |
tree | 6360d831a14c8e3344dc60034c0458a151d591d6 /drivers/gpu/drm/i915/intel_pm.c | |
parent | 27b6c122512ca30399bb1b39cc42eda83901f304 (diff) | |
parent | 8abdc17941c71b37311bb93876ac83dce58160c8 (diff) | |
download | op-kernel-dev-5d0cf3d6e07957502dae8602e2f96eb6790ddc13.zip op-kernel-dev-5d0cf3d6e07957502dae8602e2f96eb6790ddc13.tar.gz |
Merge branch 'topic/soix' into drm-intel-next-queued
Jesse's SOix work required some patches from acpi-next, so pull it in
through a topic barnch.
Conflicts:
drivers/gpu/drm/i915/i915_drv.c
drivers/gpu/drm/i915/intel_pm.c
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 24 |
1 files changed, 21 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 6cd11aa..8148d06 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4867,6 +4867,26 @@ void intel_cleanup_gt_powersave(struct drm_device *dev) valleyview_cleanup_gt_powersave(dev); } +/** + * intel_suspend_gt_powersave - suspend PM work and helper threads + * @dev: drm device + * + * We don't want to disable RC6 or other features here, we just want + * to make sure any work we've queued has finished and won't bother + * us while we're suspended. + */ +void intel_suspend_gt_powersave(struct drm_device *dev) +{ + struct drm_i915_private *dev_priv = dev->dev_private; + + /* Interrupts should be disabled already to avoid re-arming. */ + WARN_ON(dev->irq_enabled); + + flush_delayed_work(&dev_priv->rps.delayed_resume_work); + + cancel_work_sync(&dev_priv->rps.work); +} + void intel_disable_gt_powersave(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; @@ -4878,10 +4898,8 @@ void intel_disable_gt_powersave(struct drm_device *dev) ironlake_disable_drps(dev); ironlake_disable_rc6(dev); } else if (INTEL_INFO(dev)->gen >= 6) { - if (cancel_delayed_work_sync(&dev_priv->rps.delayed_resume_work)) - intel_runtime_pm_put(dev_priv); + intel_suspend_gt_powersave(dev); - cancel_work_sync(&dev_priv->rps.work); mutex_lock(&dev_priv->rps.hw_lock); if (IS_CHERRYVIEW(dev)) cherryview_disable_rps(dev); |