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| author | Deepak S <deepak.s@linux.intel.com> | 2014-07-10 13:16:26 +0530 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-07-11 18:22:01 +0200 |
| commit | 3497a5620caec0ae25e3fa3b6828f1cdeac80ec0 (patch) | |
| tree | 7017288540d8cc577cefb8768ac088fb5e518ea8 /drivers/gpu/drm/i915/intel_pm.c | |
| parent | 22b1b2f866b2089d8264e367121c9c9ee0689da4 (diff) | |
| download | op-kernel-dev-3497a5620caec0ae25e3fa3b6828f1cdeac80ec0.zip op-kernel-dev-3497a5620caec0ae25e3fa3b6828f1cdeac80ec0.tar.gz | |
drm/i915/chv: Add basic PM interrupt support for CHV
Enabled PM interrupt programming for CHV. Re-using gen8 code and extending same for CHV.
Signed-off-by: Deepak S <deepak.s@linux.intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 1ec777a..58a03f8 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -3392,6 +3392,8 @@ static void cherryview_disable_rps(struct drm_device *dev) struct drm_i915_private *dev_priv = dev->dev_private; I915_WRITE(GEN6_RC_CONTROL, 0); + + gen8_disable_rps_interrupts(dev); } static void valleyview_disable_rps(struct drm_device *dev) @@ -4109,6 +4111,8 @@ static void cherryview_enable_rps(struct drm_device *dev) valleyview_set_rps(dev_priv->dev, dev_priv->rps.efficient_freq); + gen8_enable_rps_interrupts(dev); + gen6_gt_force_wake_put(dev_priv, FORCEWAKE_ALL); } |
