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| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2013-10-11 15:26:26 +0300 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-10-15 19:01:31 +0200 |
| commit | ec98c8d1ffdc87c54ec0896db45db5b7bd22eca9 (patch) | |
| tree | 0620569a6a7a69d0ad404a3a3f2f97d270bbb060 /drivers/gpu/drm/i915/intel_pm.c | |
| parent | d9395655b92bc80c33cb6fbacbefb9ebf16403d4 (diff) | |
| download | op-kernel-dev-ec98c8d1ffdc87c54ec0896db45db5b7bd22eca9.zip op-kernel-dev-ec98c8d1ffdc87c54ec0896db45db5b7bd22eca9.tar.gz | |
drm/i915: Check 5/6 DDB split only when sprites are enabled
Using the 5/6 DDB split make sense only when sprites are enabled.
So check that before we waste any cycles computing the merged
watermarks with the 5/6 DDB split.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index cdd78f69..8064ff9 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -2931,7 +2931,8 @@ static void haswell_update_wm(struct drm_crtc *crtc) ilk_wm_merge(dev, &max, &lp_wm_1_2); /* 5/6 split only in single pipe config on IVB+ */ - if (INTEL_INFO(dev)->gen >= 7 && config.num_pipes_active == 1) { + if (INTEL_INFO(dev)->gen >= 7 && + config.num_pipes_active == 1 && config.sprites_enabled) { ilk_compute_wm_maximums(dev, 1, &config, INTEL_DDB_PART_5_6, &max); ilk_wm_merge(dev, &max, &lp_wm_5_6); |
