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authorDave Airlie <airlied@redhat.com>2017-11-02 12:40:41 +1000
committerDave Airlie <airlied@redhat.com>2017-11-02 12:40:41 +1000
commit7a88cbd8d65d622c00bd76ba4ae1d893b292c91c (patch)
tree826df7ac42ca13c33828d0142046186b91df686b /drivers/gpu/drm/i915/intel_pm.c
parent0a4334c9e5405f836c46375c6e279cfdda7da6b5 (diff)
parent0b07194bb55ed836c2cc7c22e866b87a14681984 (diff)
downloadop-kernel-dev-7a88cbd8d65d622c00bd76ba4ae1d893b292c91c.zip
op-kernel-dev-7a88cbd8d65d622c00bd76ba4ae1d893b292c91c.tar.gz
Backmerge tag 'v4.14-rc7' into drm-next
Linux 4.14-rc7 Requested by Ben Skeggs for nouveau to avoid major conflicts, and things were getting a bit conflicty already, esp around amdgpu reverts.
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
-rw-r--r--drivers/gpu/drm/i915/intel_pm.c9
1 files changed, 6 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 2fcff97..985b597 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -8477,14 +8477,17 @@ static void gen8_set_l3sqc_credits(struct drm_i915_private *dev_priv,
int high_prio_credits)
{
u32 misccpctl;
+ u32 val;
/* WaTempDisableDOPClkGating:bdw */
misccpctl = I915_READ(GEN7_MISCCPCTL);
I915_WRITE(GEN7_MISCCPCTL, misccpctl & ~GEN7_DOP_CLOCK_GATE_ENABLE);
- I915_WRITE(GEN8_L3SQCREG1,
- L3_GENERAL_PRIO_CREDITS(general_prio_credits) |
- L3_HIGH_PRIO_CREDITS(high_prio_credits));
+ val = I915_READ(GEN8_L3SQCREG1);
+ val &= ~L3_PRIO_CREDITS_MASK;
+ val |= L3_GENERAL_PRIO_CREDITS(general_prio_credits);
+ val |= L3_HIGH_PRIO_CREDITS(high_prio_credits);
+ I915_WRITE(GEN8_L3SQCREG1, val);
/*
* Wait at least 100 clocks before re-enabling clock gating.
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