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author | Ben Widawsky <ben@bwidawsk.net> | 2013-07-31 16:59:58 -0700 |
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committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-08-05 19:04:09 +0200 |
commit | c37e22046148971a35a89931aa1f951bb99d5514 (patch) | |
tree | 26e14956bac6256dae10f6f9753643a445f81e1f /drivers/gpu/drm/i915/intel_overlay.c | |
parent | fcb4a57805e04dee04f736c25a5648ec7bebe30f (diff) | |
download | op-kernel-dev-c37e22046148971a35a89931aa1f951bb99d5514.zip op-kernel-dev-c37e22046148971a35a89931aa1f951bb99d5514.tar.gz |
drm/i915: Add VM to pin
To verbalize it, one can say, "pin an object into the given address
space." The semantics of pinning remain the same otherwise.
Certain objects will always have to be bound into the global GTT.
Therefore, global GTT is a special case, and keep a special interface
around for it (i915_gem_obj_ggtt_pin).
v2: s/i915_gem_ggtt_pin/i915_gem_obj_ggtt_pin
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_overlay.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_overlay.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c index 9ec5a4e..ddfd0ae 100644 --- a/drivers/gpu/drm/i915/intel_overlay.c +++ b/drivers/gpu/drm/i915/intel_overlay.c @@ -1352,7 +1352,7 @@ void intel_setup_overlay(struct drm_device *dev) } overlay->flip_addr = reg_bo->phys_obj->handle->busaddr; } else { - ret = i915_gem_object_pin(reg_bo, PAGE_SIZE, true, false); + ret = i915_gem_obj_ggtt_pin(reg_bo, PAGE_SIZE, true, false); if (ret) { DRM_ERROR("failed to pin overlay register bo\n"); goto out_free_bo; |