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authorPeter Antoine <peter.antoine@intel.com>2016-04-13 15:03:25 +0100
committerChris Wilson <chris@chris-wilson.co.uk>2016-04-14 10:45:40 +0100
commit0ccdacf694e9e5b77601ac872f38ffba96dc5dac (patch)
tree31c9e47a221cabc33cfd5fe38f516050c2231d96 /drivers/gpu/drm/i915/intel_mocs.h
parentaa9b78104fe3210758fa9e6c644e9a108d371e8b (diff)
downloadop-kernel-dev-0ccdacf694e9e5b77601ac872f38ffba96dc5dac.zip
op-kernel-dev-0ccdacf694e9e5b77601ac872f38ffba96dc5dac.tar.gz
drm/i915/mocs: Program MOCS for all engines on init
Allow for the MOCS to be programmed for all engines. Currently we program the MOCS when the first render batch goes through. This works on most platforms but fails on platforms that do not run a render batch early, i.e. headless servers. The patch now programs all initialised engines on init and the RCS is programmed again within the initial batch. This is done for predictable consistency with regards to the hardware context. Hardware context loading sets the values of the MOCS for RCS and L3CC. Programming them from within the batch makes sure that the render context is valid, no matter what the previous state of the saved-context was. v2: posted correct version to the mailing list. v3: moved programming to within engine->init_hw() (Chris Wilson) v4: code formatting and white-space changes. (Chris Wilson) Testcase: igt/gem_mocs_settings Signed-off-by: Peter Antoine <peter.antoine@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: http://patchwork.freedesktop.org/patch/msgid/1460556205-6644-1-git-send-email-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/intel_mocs.h')
-rw-r--r--drivers/gpu/drm/i915/intel_mocs.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_mocs.h b/drivers/gpu/drm/i915/intel_mocs.h
index 76e45b1..4640299 100644
--- a/drivers/gpu/drm/i915/intel_mocs.h
+++ b/drivers/gpu/drm/i915/intel_mocs.h
@@ -53,5 +53,7 @@
#include "i915_drv.h"
int intel_rcs_context_init_mocs(struct drm_i915_gem_request *req);
+void intel_mocs_init_l3cc_table(struct drm_device *dev);
+int intel_mocs_init_engine(struct intel_engine_cs *ring);
#endif
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