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| author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-07-09 22:35:53 +0200 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-07-14 08:12:37 +0200 |
| commit | 6b89cddee051945a83cc67436ad1680ba7d9f766 (patch) | |
| tree | 360e439898781ab11dbdb42dc47d27db46e69cae /drivers/gpu/drm/i915/intel_lvds.c | |
| parent | 1795cd9b3a91d4b5473c97f491d63892442212ab (diff) | |
| download | op-kernel-dev-6b89cddee051945a83cc67436ad1680ba7d9f766.zip op-kernel-dev-6b89cddee051945a83cc67436ad1680ba7d9f766.tar.gz | |
Revert "drm/i915: Don't set the 8to6 dither flag when not scaling"
This reverts commit 773875bfb6737982903c42d1ee88cf60af80089c.
It is very much needed and the lack of dithering has been reported by
a large list of people with various gen2/3 hardware.
Also, the original patch was complete non-sense since the WARNING
backtraces in the references bugzilla are about
gmch_pfit.lvds_border_bits mismatch, not at all about the dither bit.
That one seems to work.
Cc: Jiri Kosina <jkosina@suse.cz>
Cc: Pavel Machek <pavel@ucw.cz>
Cc: Hans de Bruin <jmdebruin@xmsnet.nl>
Cc: stable@vger.kernel.org
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_lvds.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_lvds.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c index 2312602..5e5a72f 100644 --- a/drivers/gpu/drm/i915/intel_lvds.c +++ b/drivers/gpu/drm/i915/intel_lvds.c @@ -111,6 +111,13 @@ static void intel_lvds_get_config(struct intel_encoder *encoder, pipe_config->adjusted_mode.flags |= flags; + /* gen2/3 store dither state in pfit control, needs to match */ + if (INTEL_INFO(dev)->gen < 4) { + tmp = I915_READ(PFIT_CONTROL); + + pipe_config->gmch_pfit.control |= tmp & PANEL_8TO6_DITHER_ENABLE; + } + dotclock = pipe_config->port_clock; if (HAS_PCH_SPLIT(dev_priv->dev)) |
