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| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2014-11-07 11:16:02 +0200 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-11-14 10:29:20 +0100 |
| commit | 6517d2734d22b09d3c9dc44fe6879f013a716d19 (patch) | |
| tree | df411938303a20ab2710bb939526252a74572900 /drivers/gpu/drm/i915/intel_lvds.c | |
| parent | d3babd3fcd92f345ab3c627ad6bfa1463de52ba2 (diff) | |
| download | op-kernel-dev-6517d2734d22b09d3c9dc44fe6879f013a716d19.zip op-kernel-dev-6517d2734d22b09d3c9dc44fe6879f013a716d19.tar.gz | |
drm/i915: Pass the current pipe from eDP init to backlight setup
On VLV/CHV both pipes A and B have their own backlight control
registers. In order to correctly read out the current hardware state at
init we need to know which pipe is driving the eDP port. Pass that
information down from the eDP init code into the backlight code.
To determine the correct pipe we first look at which pipe is currently
configured in the port control register, if that look invalid we look
at which pipe's PPS is currently controlling the port, and if that
too looks invalid we just assume pipe A.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_lvds.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_lvds.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c index 2b50c98..c03d457 100644 --- a/drivers/gpu/drm/i915/intel_lvds.c +++ b/drivers/gpu/drm/i915/intel_lvds.c @@ -1116,7 +1116,7 @@ out: drm_connector_register(connector); intel_panel_init(&intel_connector->panel, fixed_mode, downclock_mode); - intel_panel_setup_backlight(connector); + intel_panel_setup_backlight(connector, INVALID_PIPE); return; |
