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| author | Jani Nikula <jani.nikula@intel.com> | 2015-03-27 00:20:19 +0200 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-04-01 14:11:32 +0200 |
| commit | 988c70156ce1ae146e4105a3d21ec16c5894162b (patch) | |
| tree | cf22c114e2c5bc5b6a5f1e8c8c321ff080d5e93d /drivers/gpu/drm/i915/intel_dvo.c | |
| parent | dbe4646d6e3467adbe2ec8dbe6b7ceea57dee2ec (diff) | |
| download | op-kernel-dev-988c70156ce1ae146e4105a3d21ec16c5894162b.zip op-kernel-dev-988c70156ce1ae146e4105a3d21ec16c5894162b.tar.gz | |
drm/i915: rename GMBUS_PORT_* macros as GMBUS_PIN_*
The specs refer to pin pairs. Start moving towards using pin rather than
port all around to avoid confusion. No functional changes.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dvo.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_dvo.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/intel_dvo.c b/drivers/gpu/drm/i915/intel_dvo.c index f2ed122..447cdc7 100644 --- a/drivers/gpu/drm/i915/intel_dvo.c +++ b/drivers/gpu/drm/i915/intel_dvo.c @@ -80,7 +80,7 @@ static const struct intel_dvo_device intel_dvo_devices[] = { .name = "ch7017", .dvo_reg = DVOC, .slave_addr = 0x75, - .gpio = GMBUS_PORT_DPB, + .gpio = GMBUS_PIN_DPB, .dev_ops = &ch7017_ops, }, { @@ -364,7 +364,7 @@ static int intel_dvo_get_modes(struct drm_connector *connector) * that's not the case. */ intel_ddc_get_modes(connector, - intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPC)); + intel_gmbus_get_adapter(dev_priv, GMBUS_PIN_DPC)); if (!list_empty(&connector->probed_modes)) return 1; @@ -505,9 +505,9 @@ void intel_dvo_init(struct drm_device *dev) if (intel_gmbus_is_port_valid(dvo->gpio)) gpio = dvo->gpio; else if (dvo->type == INTEL_DVO_CHIP_LVDS) - gpio = GMBUS_PORT_SSC; + gpio = GMBUS_PIN_SSC; else - gpio = GMBUS_PORT_DPB; + gpio = GMBUS_PIN_DPB; /* Set up the I2C bus necessary for the chip we're probing. * It appears that everything is on GPIOE except for panels |
