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author | Jani Nikula <jani.nikula@intel.com> | 2014-11-14 16:54:21 +0200 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-12-03 09:35:25 +0100 |
commit | e7d7cad08d35329a5a783a0aa620560223fe0eb8 (patch) | |
tree | efb969eb20eafcca30f32ba09444b15eb6d43b68 /drivers/gpu/drm/i915/intel_dsi.h | |
parent | 1362b7764088d49cedf87cd9d0b6ac2f16306dbf (diff) | |
download | op-kernel-dev-e7d7cad08d35329a5a783a0aa620560223fe0eb8.zip op-kernel-dev-e7d7cad08d35329a5a783a0aa620560223fe0eb8.tar.gz |
drm/i915/dsi: clean up MIPI DSI pipe vs. port usage
MIPI DSI works on ports A and C, which map to pipes A and B,
respectively. Things are going to get more complicated with the
introduction of dual link DSI support, so clean up the register defines
and code to match reality.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Gaurav K Singh <gaurav.k.singh@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dsi.h')
-rw-r--r-- | drivers/gpu/drm/i915/intel_dsi.h | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h index 657eb5c..97a6f62 100644 --- a/drivers/gpu/drm/i915/intel_dsi.h +++ b/drivers/gpu/drm/i915/intel_dsi.h @@ -127,6 +127,22 @@ struct intel_dsi { u16 panel_pwr_cycle_delay; }; +/* XXX: Transitional before dual port configuration */ +static inline enum port intel_dsi_pipe_to_port(enum pipe pipe) +{ + if (pipe == PIPE_A) + return PORT_A; + else if (pipe == PIPE_B) + return PORT_C; + + WARN(1, "DSI on pipe %c, assuming port C\n", pipe_name(pipe)); + return PORT_C; +} + +#define for_each_dsi_port(__port, __ports_mask) \ + for ((__port) = PORT_A; (__port) < I915_MAX_PORTS; (__port)++) \ + if ((__ports_mask) & (1 << (__port))) + static inline struct intel_dsi *enc_to_intel_dsi(struct drm_encoder *encoder) { return container_of(encoder, struct intel_dsi, base.base); |