diff options
author | Jani Nikula <jani.nikula@intel.com> | 2016-03-16 12:21:40 +0200 |
---|---|---|
committer | Jani Nikula <jani.nikula@intel.com> | 2016-03-16 17:55:52 +0200 |
commit | 1e78aa014b84ff23f99daa0e0832b01337244062 (patch) | |
tree | 195618d891b7c536205f460eb6c239a09cb708d5 /drivers/gpu/drm/i915/intel_dsi.h | |
parent | 42c151e65e80d22b611ba07812374ed726ebb947 (diff) | |
download | op-kernel-dev-1e78aa014b84ff23f99daa0e0832b01337244062.zip op-kernel-dev-1e78aa014b84ff23f99daa0e0832b01337244062.tar.gz |
drm/i915/dsi: start using enum mipi_dsi_pixel_format
A small step moving us closer to DRM MIPI DSI code. Use enum
mipi_dsi_pixel_format instead of our own. The first benefit is being
able to use common mipi_dsi_pixel_format_to_bpp().
There's a little back and forth conversion with the VBT -> enum ->
register, since we have just shoved the VBT value into the register
directly. Longer term, all the VBT parsing and deciphering should be
done in intel_bios.c, and abstracted there.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1458123700-16003-2-git-send-email-jani.nikula@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dsi.h')
-rw-r--r-- | drivers/gpu/drm/i915/intel_dsi.h | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h index 92f3922..54f072c 100644 --- a/drivers/gpu/drm/i915/intel_dsi.h +++ b/drivers/gpu/drm/i915/intel_dsi.h @@ -34,8 +34,6 @@ #define DSI_DUAL_LINK_FRONT_BACK 1 #define DSI_DUAL_LINK_PIXEL_ALT 2 -int dsi_pixel_format_bpp(int pixel_format); - struct intel_dsi_host; struct intel_dsi { @@ -64,8 +62,12 @@ struct intel_dsi { /* number of DSI lanes */ unsigned int lane_count; - /* video mode pixel format for MIPI_DSI_FUNC_PRG register */ - u32 pixel_format; + /* + * video mode pixel format + * + * XXX: consolidate on .format in struct mipi_dsi_device. + */ + enum mipi_dsi_pixel_format pixel_format; /* video mode format for MIPI_VIDEO_MODE_FORMAT register */ u32 video_mode_format; |