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| author | Ramalingam C <ramalingam.c@intel.com> | 2016-02-03 18:20:46 +0530 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2016-02-04 11:07:35 +0200 |
| commit | 58d4d32f431a560baff5fbb6deae8ad324552dde (patch) | |
| tree | e24d7480f7300a6b8e287998129d90d19fa8f510 /drivers/gpu/drm/i915/intel_dsi.c | |
| parent | de4726649b6b1d7f3f02b2031ee99e067cb71e2d (diff) | |
| download | op-kernel-dev-58d4d32f431a560baff5fbb6deae8ad324552dde.zip op-kernel-dev-58d4d32f431a560baff5fbb6deae8ad324552dde.tar.gz | |
drm/i915/dsi: Configure DSI after enabling DSI pll
We need to enable DSI PLL before configuring the DSI registers.
This has worked before on BYT/CHV, but BXT is more fussy.
Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Tested-by: Mika Kahola <mika.kahola@intel.com> # BXT
Tested-by: Jani Nikula <jani.nikula@intel.com> # BYT
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1454503846-12103-1-git-send-email-ramalingam.c@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dsi.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_dsi.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c index 91cef35..378f879 100644 --- a/drivers/gpu/drm/i915/intel_dsi.c +++ b/drivers/gpu/drm/i915/intel_dsi.c @@ -478,8 +478,8 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder) DRM_DEBUG_KMS("\n"); - intel_dsi_prepare(encoder); intel_enable_dsi_pll(encoder); + intel_dsi_prepare(encoder); /* Panel Enable over CRC PMIC */ if (intel_dsi->gpio_panel) |
