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author | ymohanma <yogesh.mohan.marimuthu@intel.com> | 2013-08-27 23:40:56 +0300 |
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committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-09-04 17:34:48 +0200 |
commit | be4fc046bed35f7a50c8d5751abf555933d864ae (patch) | |
tree | ea79cfb822277709907223c3d59c89b625379b1d /drivers/gpu/drm/i915/intel_dsi.c | |
parent | 4e646495c6153f304fe45b6564ee08d4df935bb1 (diff) | |
download | op-kernel-dev-be4fc046bed35f7a50c8d5751abf555933d864ae.zip op-kernel-dev-be4fc046bed35f7a50c8d5751abf555933d864ae.tar.gz |
drm/i915: add VLV DSI PLL Calculations
v2:
- Grab dpio_lock mutex in vlv_enable_dsi_pll().
- Add and call vlv_disable_dsi_pll().
v3: Mostly based on Ville's review comments.
- Only pipe A has DSI PLL lock bit.
- Add more of CCK REG bit definitions for DSI PLL.
- Make tables static.
- Move clock gating out of the clock calculation functions.
- DSI PLL LDO power gating.
- Put alternative MNP from table calc behind #ifdef.
v4: s/CKK/CLK/ in the CCK REG bit definitions (Ville).
Signed-off-by: ymohanma <yogesh.mohan.marimuthu@intel.com>
Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dsi.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_dsi.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c index 0dfb28f..263c8d2 100644 --- a/drivers/gpu/drm/i915/intel_dsi.c +++ b/drivers/gpu/drm/i915/intel_dsi.c @@ -83,6 +83,8 @@ static bool intel_dsi_compute_config(struct intel_encoder *encoder, static void intel_dsi_pre_pll_enable(struct intel_encoder *encoder) { DRM_DEBUG_KMS("\n"); + + vlv_enable_dsi_pll(encoder); } static void intel_dsi_pre_enable(struct intel_encoder *encoder) @@ -167,6 +169,8 @@ static void intel_dsi_disable(struct intel_encoder *encoder) static void intel_dsi_post_disable(struct intel_encoder *encoder) { DRM_DEBUG_KMS("\n"); + + vlv_disable_dsi_pll(encoder); } static bool intel_dsi_get_hw_state(struct intel_encoder *encoder, @@ -303,6 +307,9 @@ static void intel_dsi_mode_set(struct intel_encoder *intel_encoder) DRM_DEBUG_KMS("pipe %d\n", pipe); + /* Update the DSI PLL */ + vlv_enable_dsi_pll(intel_encoder); + /* escape clock divider, 20MHz, shared for A and C. device ready must be * off when doing this! txclkesc? */ tmp = I915_READ(MIPI_CTRL(0)); |