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| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2014-10-16 21:27:30 +0300 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-11-04 23:22:00 +0100 |
| commit | 36b5f425dd560d37f5633cf317818377c1db70de (patch) | |
| tree | 282b23e22ccb81a5e3653bfa99611a1c80740893 /drivers/gpu/drm/i915/intel_drv.h | |
| parent | 7a66800e035bb6a64c2d0f8cb315edabbef819b9 (diff) | |
| download | op-kernel-dev-36b5f425dd560d37f5633cf317818377c1db70de.zip op-kernel-dev-36b5f425dd560d37f5633cf317818377c1db70de.tar.gz | |
drm/i915: Store power sequencer delays in intel_dp
The power seqeuncer delays are fixed for a given panel, so we can keep
them around once computed.
Not that on VLV/CHV we still re-compute them every time we initialize
the power seqeuncer registers, but that will change soon enough.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_drv.h')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_drv.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 1e58e64..b323c9b 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -592,6 +592,7 @@ struct intel_dp { * this port. Only relevant on VLV/CHV. */ enum pipe pps_pipe; + struct edp_power_seq pps_delays; bool use_tps3; bool can_mst; /* this port supports mst */ |
