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authorJani Nikula <jani.nikula@intel.com>2017-03-28 17:59:04 +0300
committerJani Nikula <jani.nikula@intel.com>2017-04-06 14:33:55 +0300
commit55cfc580809698e952c1df36140eefb8d97ce222 (patch)
tree335eb99c535687839cfc86bc80d7e78c340e263d /drivers/gpu/drm/i915/intel_drv.h
parent8001b7541aa7a2f0adc4941bdebf44ea969e7ed5 (diff)
downloadop-kernel-dev-55cfc580809698e952c1df36140eefb8d97ce222.zip
op-kernel-dev-55cfc580809698e952c1df36140eefb8d97ce222.tar.gz
drm/i915/dp: cache source rates at init
We need the source rates array so often that it makes sense to set it once at init. This reduces function calls when we need the rates, making the code easier to follow. Cc: Manasi Navare <manasi.d.navare@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Manasi Navare <manasi.d.navare@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/aa998882d2b824f671272c60e9d26621ab9d2d17.1490712890.git.jani.nikula@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_drv.h')
-rw-r--r--drivers/gpu/drm/i915/intel_drv.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 313fad0..c3382eb 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -949,6 +949,9 @@ struct intel_dp {
uint8_t psr_dpcd[EDP_PSR_RECEIVER_CAP_SIZE];
uint8_t downstream_ports[DP_MAX_DOWNSTREAM_PORTS];
uint8_t edp_dpcd[EDP_DISPLAY_CTL_CAP_SIZE];
+ /* source rates */
+ int num_source_rates;
+ const int *source_rates;
/* sink rates as reported by DP_SUPPORTED_LINK_RATES */
uint8_t num_sink_rates;
int sink_rates[DP_MAX_SUPPORTED_RATES];
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