summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/i915/intel_dpll_mgr.c
diff options
context:
space:
mode:
authorImre Deak <imre.deak@intel.com>2016-03-14 19:55:34 +0200
committerImre Deak <imre.deak@intel.com>2016-03-16 16:08:44 +0200
commit08250c4ba650a9d8453166b4c05962766798fe9b (patch)
tree97cfa380ff731812c5333328c5ee277ff533fb54 /drivers/gpu/drm/i915/intel_dpll_mgr.c
parent31ae71fca7f91101613fac9deb8e858e1319b4f5 (diff)
downloadop-kernel-dev-08250c4ba650a9d8453166b4c05962766798fe9b.zip
op-kernel-dev-08250c4ba650a9d8453166b4c05962766798fe9b.tar.gz
drm/i915/bxt: Fix off-by-one error in Broxton PLL IDs
After the commit below the Broxton PLL IDs had an off-by-one error, so fix this up. Also add a missing brace at intel_shared_dpll_init(), it happened to compile only due to the way the IS_BROXTON macro is defined. v2: - remove debugging left-over Fixes: a3c988ea068c ("drm/i915: Make SKL/KBL DPLL0 managed by the shared dpll code") CC: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> CC: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com> Link: http://patchwork.freedesktop.org/patch/msgid/1457978134-12362-1-git-send-email-imre.deak@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dpll_mgr.c')
-rw-r--r--drivers/gpu/drm/i915/intel_dpll_mgr.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c b/drivers/gpu/drm/i915/intel_dpll_mgr.c
index 4b636c4..74d5aec 100644
--- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
@@ -1706,9 +1706,9 @@ static const struct intel_dpll_mgr skl_pll_mgr = {
};
static const struct dpll_info bxt_plls[] = {
- { "PORT PLL A", 0, &bxt_ddi_pll_funcs, 0 },
- { "PORT PLL B", 1, &bxt_ddi_pll_funcs, 0 },
- { "PORT PLL C", 2, &bxt_ddi_pll_funcs, 0 },
+ { "PORT PLL A", DPLL_ID_SKL_DPLL0, &bxt_ddi_pll_funcs, 0 },
+ { "PORT PLL B", DPLL_ID_SKL_DPLL1, &bxt_ddi_pll_funcs, 0 },
+ { "PORT PLL C", DPLL_ID_SKL_DPLL2, &bxt_ddi_pll_funcs, 0 },
{ NULL, -1, NULL, },
};
@@ -1726,7 +1726,7 @@ void intel_shared_dpll_init(struct drm_device *dev)
if (IS_SKYLAKE(dev) || IS_KABYLAKE(dev))
dpll_mgr = &skl_pll_mgr;
- else if IS_BROXTON(dev)
+ else if (IS_BROXTON(dev))
dpll_mgr = &bxt_pll_mgr;
else if (HAS_DDI(dev))
dpll_mgr = &hsw_pll_mgr;
OpenPOWER on IntegriCloud