diff options
| author | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2015-11-05 10:50:20 -0800 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-11-18 11:22:34 +0100 |
| commit | c6297843829469571639f04d62292d1c75676b20 (patch) | |
| tree | 33ddc2f5ca0e28ea64a0b34621af5045da16be37 /drivers/gpu/drm/i915/intel_dp.c | |
| parent | d72f9d919a60e5096105237a72f046b7a20fb53f (diff) | |
| download | op-kernel-dev-c6297843829469571639f04d62292d1c75676b20.zip op-kernel-dev-c6297843829469571639f04d62292d1c75676b20.tar.gz | |
drm/i915: Make Sink crc calculation waiting for counter to reset.
According to VESA DP spec TEST_CRC_COUNT (Bits 3:0) at
TEST_SINK_MISC (00246h) is "Reset to 0 when TEST_SINK bit 0 = 0;
So let's give few vblanks so we are really sure that this counter
is really zeroed on the next sink_crc read.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dp.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_dp.c | 19 |
1 files changed, 18 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 3ffedd8..a2d2636 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -3953,6 +3953,8 @@ static int intel_dp_sink_crc_stop(struct intel_dp *intel_dp) struct intel_crtc *intel_crtc = to_intel_crtc(dig_port->base.base.crtc); u8 buf; int ret = 0; + int count = 0; + int attempts = 10; if (drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK, &buf) < 0) { DRM_DEBUG_KMS("Sink CRC couldn't be stopped properly\n"); @@ -3967,7 +3969,22 @@ static int intel_dp_sink_crc_stop(struct intel_dp *intel_dp) goto out; } - intel_wait_for_vblank(dev, intel_crtc->pipe); + do { + intel_wait_for_vblank(dev, intel_crtc->pipe); + + if (drm_dp_dpcd_readb(&intel_dp->aux, + DP_TEST_SINK_MISC, &buf) < 0) { + ret = -EIO; + goto out; + } + count = buf & DP_TEST_COUNT_MASK; + } while (--attempts && count); + + if (attempts == 0) { + DRM_ERROR("TIMEOUT: Sink CRC counter is not zeroed\n"); + ret = -ETIMEDOUT; + } + intel_dp->sink_crc.started = false; out: hsw_enable_ips(intel_crtc); |
