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authorManasi Navare <manasi.d.navare@intel.com>2017-06-26 12:21:44 -0700
committerVille Syrjälä <ville.syrjala@linux.intel.com>2017-06-27 12:55:15 +0300
commit770a17a5713af26d1490d4f669194ed959b88241 (patch)
tree79e64fdb81190fa996ec46d08feb236eb5a8925c /drivers/gpu/drm/i915/intel_dp.c
parent36703e79a982c8ce5a8e43833291f2719e92d0d1 (diff)
downloadop-kernel-dev-770a17a5713af26d1490d4f669194ed959b88241.zip
op-kernel-dev-770a17a5713af26d1490d4f669194ed959b88241.tar.gz
drm/i915/dp: Fix the t11_t12 panel power cycle delay from VBT read
When we read the VBT t11_t12 value for panel power cycle delay, it is a zero based value so we need to 100ms to that. And then it needs to be multiplied by 10 to store it in 100usecs unit same as SW VBT. v3: * Add it as part of series v2: * Change the VBT value instead of HW readout and pp div (Ville Syrjala) Reviewed-by: Ville Syrjala <ville.syrjala@linux.intel.com> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> Cc: Ville Syrjala <ville.syrjala@linux.intel.com> Cc: Clint Taylor <clinton.a.taylor@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1498504905-21067-1-git-send-email-manasi.d.navare@intel.com Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dp.c')
-rw-r--r--drivers/gpu/drm/i915/intel_dp.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 2eb6e0f..95ff5d6 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -5259,6 +5259,11 @@ intel_dp_init_panel_power_sequencer(struct drm_device *dev,
intel_pps_dump_state("cur", &cur);
vbt = dev_priv->vbt.edp.pps;
+ /* T11_T12 delay is special and actually in units of 100ms, but zero
+ * based in the hw (so we need to add 100 ms). But the sw vbt
+ * table multiplies it with 1000 to make it in units of 100usec,
+ * too. */
+ vbt.t11_t12 += 100 * 10;
/* Upper limits from eDP 1.3 spec. Note that we use the clunky units of
* our hw here, which are all in 100usec. */
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