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| author | Paulo Zanoni <paulo.r.zanoni@intel.com> | 2014-01-08 17:26:31 -0200 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-01-10 17:59:17 +0100 |
| commit | 41e6fc4cd474cc0d4765c7fbf98935245fd48066 (patch) | |
| tree | a3d238f05697845d4126344541697d8a64dee2bc /drivers/gpu/drm/i915/intel_display.c | |
| parent | ba0fbca474939e9b4086796ddcca1510f303a60b (diff) | |
| download | op-kernel-dev-41e6fc4cd474cc0d4765c7fbf98935245fd48066.zip op-kernel-dev-41e6fc4cd474cc0d4765c7fbf98935245fd48066.tar.gz | |
drm/i915: only apply GAMMA_MODE IPS WA on HSW
The WA is mentioned in HSW's GAMMA_MODE register documentation, but
not on on BDW's documentation, so let's assume it is not needed there.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index aaa4ae6..554e83d 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -3496,7 +3496,7 @@ static void intel_crtc_load_lut(struct drm_crtc *crtc) /* Workaround : Do not read or write the pipe palette/gamma data while * GAMMA_MODE is configured for split gamma and IPS_CTL has IPS enabled. */ - if (intel_crtc->config.ips_enabled && + if (IS_HASWELL(dev) && intel_crtc->config.ips_enabled && ((I915_READ(GAMMA_MODE(pipe)) & GAMMA_MODE_MODE_MASK) == GAMMA_MODE_MODE_SPLIT)) { hsw_disable_ips(intel_crtc); |
