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authorJesse Barnes <jbarnes@virtuousgeek.org>2014-01-22 12:58:04 -0800
committerDaniel Vetter <daniel.vetter@ffwll.ch>2014-01-24 17:23:00 +0100
commit20f0ec16ca5c51accdb9a7631411b39aa6b4256e (patch)
tree070d0faff0acf7be37a66a0b772436bb5d7727d4 /drivers/gpu/drm/i915/intel_ddi.c
parentf113d75019dfad7758c723116c7ae0ddd97d91ed (diff)
downloadop-kernel-dev-20f0ec16ca5c51accdb9a7631411b39aa6b4256e.zip
op-kernel-dev-20f0ec16ca5c51accdb9a7631411b39aa6b4256e.tar.gz
drm/i915: fix WRPLL clock calculation
Forgot to convert to using the refclk variable when I added refclk readout support, and Paulo noticed the resulting calculation was off due to the way p & r are stored. Reported-by: Paulo Zanoni <przanoni@gmail.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Tested-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_ddi.c')
-rw-r--r--drivers/gpu/drm/i915/intel_ddi.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index fe2967e..cd65dd0 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -663,7 +663,8 @@ static int intel_ddi_calc_wrpll_link(struct drm_i915_private *dev_priv,
p = (wrpll & WRPLL_DIVIDER_POST_MASK) >> WRPLL_DIVIDER_POST_SHIFT;
n = (wrpll & WRPLL_DIVIDER_FB_MASK) >> WRPLL_DIVIDER_FB_SHIFT;
- return (LC_FREQ * n) / (p * r);
+ /* Convert to KHz, p & r have a fixed point portion */
+ return (refclk * n * 100) / (p * r);
}
static void intel_ddi_clock_get(struct intel_encoder *encoder,
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