diff options
| author | José Roberto de Souza <jose.souza@intel.com> | 2018-04-25 14:23:33 -0700 |
|---|---|---|
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2018-04-26 15:36:12 -0700 |
| commit | d0bc86231a55d72860ac3a07a0f676fc18f2dd9d (patch) | |
| tree | 39e77654f0686593c236b08ac480b1b1632660ae /drivers/gpu/drm/i915/intel_csr.c | |
| parent | bc18b4df0fcb9fa4a50a19576723f14bfdd10c26 (diff) | |
| download | op-kernel-dev-d0bc86231a55d72860ac3a07a0f676fc18f2dd9d.zip op-kernel-dev-d0bc86231a55d72860ac3a07a0f676fc18f2dd9d.tar.gz | |
drm/i915/debugfs: Print sink PSR status
IGT tests could be improved with sink status, knowing for sure that
hardware have activate or exit PSR.
v3:
Reading i915_edp_psr_status was causing PSR to exit but now with
'drm/i915/psr: Prevent PSR exit when a non-pipe related register is
written' it is fixed.
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180425212334.21109-3-jose.souza@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_csr.c')
0 files changed, 0 insertions, 0 deletions
