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authorVille Syrjälä <ville.syrjala@linux.intel.com>2017-01-20 20:22:00 +0200
committerVille Syrjälä <ville.syrjala@linux.intel.com>2017-02-08 18:07:10 +0200
commit3d5dbb10f34ad0521bfb7091bd5b47f6c984b9aa (patch)
tree1664c9e2a7e91303801d30f29a3cbaac62134ad4 /drivers/gpu/drm/i915/intel_cdclk.c
parentbb0f4aab0e7677e91cde443fecc18e71fbb85038 (diff)
downloadop-kernel-dev-3d5dbb10f34ad0521bfb7091bd5b47f6c984b9aa.zip
op-kernel-dev-3d5dbb10f34ad0521bfb7091bd5b47f6c984b9aa.tar.gz
drm/i915: Pass dev_priv to remainder of the cdclk functions
Clean up the dev vs. dev_priv straggles that are making things look inconsistentt. v2: Deal with churn Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170120182205.8141-10-ville.syrjala@linux.intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_cdclk.c')
-rw-r--r--drivers/gpu/drm/i915/intel_cdclk.c25
1 files changed, 10 insertions, 15 deletions
diff --git a/drivers/gpu/drm/i915/intel_cdclk.c b/drivers/gpu/drm/i915/intel_cdclk.c
index 6529a26..9d1e2a4 100644
--- a/drivers/gpu/drm/i915/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/intel_cdclk.c
@@ -485,9 +485,8 @@ static void vlv_program_pfi_credits(struct drm_i915_private *dev_priv)
WARN_ON(I915_READ(GCI_CONTROL) & PFI_CREDIT_RESEND);
}
-static void vlv_set_cdclk(struct drm_device *dev, int cdclk)
+static void vlv_set_cdclk(struct drm_i915_private *dev_priv, int cdclk)
{
- struct drm_i915_private *dev_priv = to_i915(dev);
u32 val, cmd;
if (cdclk >= 320000) /* jump to highest voltage for 400MHz too */
@@ -548,9 +547,8 @@ static void vlv_set_cdclk(struct drm_device *dev, int cdclk)
intel_update_cdclk(dev_priv);
}
-static void chv_set_cdclk(struct drm_device *dev, int cdclk)
+static void chv_set_cdclk(struct drm_i915_private *dev_priv, int cdclk)
{
- struct drm_i915_private *dev_priv = to_i915(dev);
u32 val, cmd;
switch (cdclk) {
@@ -618,9 +616,8 @@ static void bdw_get_cdclk(struct drm_i915_private *dev_priv,
cdclk_state->cdclk = 675000;
}
-static void bdw_set_cdclk(struct drm_device *dev, int cdclk)
+static void bdw_set_cdclk(struct drm_i915_private *dev_priv, int cdclk)
{
- struct drm_i915_private *dev_priv = to_i915(dev);
uint32_t val, data;
int ret;
@@ -1455,8 +1452,7 @@ static int intel_max_pixel_rate(struct drm_atomic_state *state)
static int vlv_modeset_calc_cdclk(struct drm_atomic_state *state)
{
- struct drm_device *dev = state->dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
+ struct drm_i915_private *dev_priv = to_i915(state->dev);
int max_pixclk = intel_max_pixel_rate(state);
struct intel_atomic_state *intel_state =
to_intel_atomic_state(state);
@@ -1486,8 +1482,7 @@ static int vlv_modeset_calc_cdclk(struct drm_atomic_state *state)
static void vlv_modeset_commit_cdclk(struct drm_atomic_state *old_state)
{
- struct drm_device *dev = old_state->dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
+ struct drm_i915_private *dev_priv = to_i915(old_state->dev);
unsigned int req_cdclk = dev_priv->cdclk.actual.cdclk;
/*
@@ -1502,9 +1497,9 @@ static void vlv_modeset_commit_cdclk(struct drm_atomic_state *old_state)
intel_display_power_get(dev_priv, POWER_DOMAIN_PIPE_A);
if (IS_CHERRYVIEW(dev_priv))
- chv_set_cdclk(dev, req_cdclk);
+ chv_set_cdclk(dev_priv, req_cdclk);
else
- vlv_set_cdclk(dev, req_cdclk);
+ vlv_set_cdclk(dev_priv, req_cdclk);
vlv_program_pfi_credits(dev_priv);
@@ -1546,10 +1541,10 @@ static int bdw_modeset_calc_cdclk(struct drm_atomic_state *state)
static void bdw_modeset_commit_cdclk(struct drm_atomic_state *old_state)
{
- struct drm_device *dev = old_state->dev;
- unsigned int req_cdclk = to_i915(dev)->cdclk.actual.cdclk;
+ struct drm_i915_private *dev_priv = to_i915(old_state->dev);
+ unsigned int req_cdclk = dev_priv->cdclk.actual.cdclk;
- bdw_set_cdclk(dev, req_cdclk);
+ bdw_set_cdclk(dev_priv, req_cdclk);
}
static int skl_modeset_calc_cdclk(struct drm_atomic_state *state)
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