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author | Jesse Barnes <jbarnes@virtuousgeek.org> | 2013-09-26 17:55:58 -0700 |
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committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-10-01 07:45:44 +0200 |
commit | e454a05da623c26544721b159caaacdb6dfe448c (patch) | |
tree | b7d34646a994884941f515b452a8cad00839b431 /drivers/gpu/drm/i915/i915_sysfs.c | |
parent | 49798eb2fe7240900d0a22a4e8d2b8e2f2ea6684 (diff) | |
download | op-kernel-dev-e454a05da623c26544721b159caaacdb6dfe448c.zip op-kernel-dev-e454a05da623c26544721b159caaacdb6dfe448c.tar.gz |
drm/i915/vlv: use correct units for rc6 residency v2
We need to use the clock control reg to figure out how many CZ clks are in
30ns and use that as the basis for our RC6 residency calculations.
v2: use ULL everywhere for consistency (Chris)
factor out bias for clarity (Chris)
References: https://bugs.freedesktop.org/show_bug.cgi?id=69692
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_sysfs.c')
-rw-r--r-- | drivers/gpu/drm/i915/i915_sysfs.c | 22 |
1 files changed, 20 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c index 44f4c1a..8003886 100644 --- a/drivers/gpu/drm/i915/i915_sysfs.c +++ b/drivers/gpu/drm/i915/i915_sysfs.c @@ -37,12 +37,30 @@ static u32 calc_residency(struct drm_device *dev, const u32 reg) { struct drm_i915_private *dev_priv = dev->dev_private; u64 raw_time; /* 32b value may overflow during fixed point math */ + u64 units = 128ULL, div = 100000ULL, bias = 100ULL; if (!intel_enable_rc6(dev)) return 0; - raw_time = I915_READ(reg) * 128ULL; - return DIV_ROUND_UP_ULL(raw_time, 100000); + /* On VLV, residency time is in CZ units rather than 1.28us */ + if (IS_VALLEYVIEW(dev)) { + u32 clkctl2; + + clkctl2 = I915_READ(VLV_CLK_CTL2) >> + CLK_CTL2_CZCOUNT_30NS_SHIFT; + if (!clkctl2) { + WARN(!clkctl2, "bogus CZ count value"); + return 0; + } + units = DIV_ROUND_UP_ULL(30ULL * bias, (u64)clkctl2); + if (I915_READ(VLV_COUNTER_CONTROL) & VLV_COUNT_RANGE_HIGH) + units <<= 8; + + div = 1000000ULL * bias; + } + + raw_time = I915_READ(reg) * units; + return DIV_ROUND_UP_ULL(raw_time, div); } static ssize_t |