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author | Sagar Arun Kamble <sagar.a.kamble@intel.com> | 2017-10-10 22:30:07 +0100 |
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committer | Chris Wilson <chris@chris-wilson.co.uk> | 2017-10-11 08:57:02 +0100 |
commit | 771decb0b4d75b5cc1d7ddfbdf512bd8768d2793 (patch) | |
tree | de57a1d774eed327cac8db852d398b9cfc863822 /drivers/gpu/drm/i915/i915_sysfs.c | |
parent | 562d9bae08a10335368bf54ea5cc7e4f6185bccc (diff) | |
download | op-kernel-dev-771decb0b4d75b5cc1d7ddfbdf512bd8768d2793.zip op-kernel-dev-771decb0b4d75b5cc1d7ddfbdf512bd8768d2793.tar.gz |
drm/i915: Rename intel_enable_rc6 to intel_rc6_enabled
This function gives the status of RC6, whether disabled or if
enabled then which state. intel_enable_rc6 will be used for
enabling RC6 in the next patch.
v2: Rebase.
v3: Rebase.
Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: Radoslaw Szwichtenberg <radoslaw.szwichtenberg@intel.com> #1
Reviewed-by: Ewelina Musial <ewelina.musial@intel.com> #1
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/1507360055-19948-10-git-send-email-sagar.a.kamble@intel.com
Acked-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20171010213010.7415-9-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/i915_sysfs.c')
-rw-r--r-- | drivers/gpu/drm/i915/i915_sysfs.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c index 0a57f98..791759f 100644 --- a/drivers/gpu/drm/i915/i915_sysfs.c +++ b/drivers/gpu/drm/i915/i915_sysfs.c @@ -49,7 +49,7 @@ static u32 calc_residency(struct drm_i915_private *dev_priv, static ssize_t show_rc6_mask(struct device *kdev, struct device_attribute *attr, char *buf) { - return snprintf(buf, PAGE_SIZE, "%x\n", intel_enable_rc6()); + return snprintf(buf, PAGE_SIZE, "%x\n", intel_rc6_enabled()); } static ssize_t |