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| author | Chris Wilson <chris@chris-wilson.co.uk> | 2010-12-03 21:35:48 +0000 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2010-12-05 00:37:36 +0000 |
| commit | c1858123dba4a9e40355363ac7a153ea23a5315d (patch) | |
| tree | 0f5c60c6fdf413b78dbe7d8c1f3927db925908de /drivers/gpu/drm/i915/i915_reg.h | |
| parent | a589b9f429ac0e5bcdebda0f74ee313d39d69b7f (diff) | |
| download | op-kernel-dev-c1858123dba4a9e40355363ac7a153ea23a5315d.zip op-kernel-dev-c1858123dba4a9e40355363ac7a153ea23a5315d.tar.gz | |
drm/i915: Enable CB tuning of the Display PLL
Magic numbers from the specs. This is supposed to allow the PLL some
variance to improve jitter performance and VCO headroom across
manufacturing and environmental variations.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 9984570..06175e9 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -2712,6 +2712,7 @@ #define PCH_DPLL(pipe) _PIPE(pipe, PCH_DPLL_A, PCH_DPLL_B) #define PCH_FPA0 0xc6040 +#define FP_CB_TUNE (0x3<<22) #define PCH_FPA1 0xc6044 #define PCH_FPB0 0xc6048 #define PCH_FPB1 0xc604c |
