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| author | Imre Deak <imre.deak@intel.com> | 2014-05-19 11:41:17 +0300 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-05-19 17:13:18 +0200 |
| commit | cf63e4a2206be00336c17f42a810da5ce47e0e78 (patch) | |
| tree | c089ca90a974db677f037ae6b82bc6f39cb6c69b /drivers/gpu/drm/i915/i915_reg.h | |
| parent | eba905b2975c12158d964a09200c8df12e8d2c6e (diff) | |
| download | op-kernel-dev-cf63e4a2206be00336c17f42a810da5ce47e0e78.zip op-kernel-dev-cf63e4a2206be00336c17f42a810da5ce47e0e78.tar.gz | |
drm/i915: rename IOSF sideband opcodes according to the spec
These opcodes are not specific for an endpoint, but are the same for all
endpoints. So rename them accordingly, using the name the VLV2 sideband
HAS uses. Also move the macros to the .c file, since they aren't used
anywhere else.
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index ac90786..3d437d1 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -484,9 +484,6 @@ /* See configdb bunit SB addr map */ #define BUNIT_REG_BISOC 0x11 -#define PUNIT_OPCODE_REG_READ 6 -#define PUNIT_OPCODE_REG_WRITE 7 - #define PUNIT_REG_DSPFREQ 0x36 #define DSPFREQSTAT_SHIFT 30 #define DSPFREQSTAT_MASK (0x3 << DSPFREQSTAT_SHIFT) @@ -580,8 +577,6 @@ enum punit_power_well { * Note: digital port B is DDI0, digital pot C is DDI1 */ #define DPIO_DEVFN 0 -#define DPIO_OPCODE_REG_WRITE 1 -#define DPIO_OPCODE_REG_READ 0 #define DPIO_CTL (VLV_DISPLAY_BASE + 0x2110) #define DPIO_MODSEL1 (1<<3) /* if ref clk b == 27 */ |
