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| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2014-06-13 13:37:48 +0300 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-07-07 11:15:25 +0200 |
| commit | 9cf33db5eb6a485a16668e19dbcfdfc0f6c61090 (patch) | |
| tree | ee997bad29a19bfffa4790c255cd4a01a5e776cf /drivers/gpu/drm/i915/i915_reg.h | |
| parent | dfcab17e57aa784f174bc3f6beb6086f9956575a (diff) | |
| download | op-kernel-dev-9cf33db5eb6a485a16668e19dbcfdfc0f6c61090.zip op-kernel-dev-9cf33db5eb6a485a16668e19dbcfdfc0f6c61090.tar.gz | |
drm/i915: Give names to the CCK_DISPLAY_CLOCK_CONTROL bits
Avoid using magic values for CCK frequency bits. Also the mask we were
using for the requested frequency was one bit too short. Fix it up.
Note: This also fixes the #define for a mask (spotted by Jesse in his
review).
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
[danvet: Add note about mask change.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 3488567..66151ff 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -584,6 +584,11 @@ enum punit_power_well { #define DSI_PLL_M1_DIV_SHIFT 0 #define DSI_PLL_M1_DIV_MASK (0x1ff << 0) #define CCK_DISPLAY_CLOCK_CONTROL 0x6b +#define DISPLAY_TRUNK_FORCE_ON (1 << 17) +#define DISPLAY_TRUNK_FORCE_OFF (1 << 16) +#define DISPLAY_FREQUENCY_STATUS (0x1f << 8) +#define DISPLAY_FREQUENCY_STATUS_SHIFT 8 +#define DISPLAY_FREQUENCY_VALUES (0x1f << 0) /** * DOC: DPIO |
