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author | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2014-06-12 10:16:42 -0700 |
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committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-06-13 17:45:26 +0200 |
commit | 82c562549b4c86274c564d3b3498020559683dcd (patch) | |
tree | 95ef55779e62b47c7798d39eb81df1a0fd2e7f5a /drivers/gpu/drm/i915/i915_reg.h | |
parent | 34eb7579dce8126049ae45bf27b6d4235ceaedf1 (diff) | |
download | op-kernel-dev-82c562549b4c86274c564d3b3498020559683dcd.zip op-kernel-dev-82c562549b4c86274c564d3b3498020559683dcd.tar.gz |
drm/i915: BDW PSR: Add single frame update support.
When link is in stand by and PSR exit is triggered by a primary or sprite
plane flip this mode allows only one single updated frame to be send to
display than get back to PSR immediately.
Reviewed-by: Vijay Purushothaman <vijay.a.purushothaman@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
-rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 05e2541..9ce017b 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -2409,6 +2409,7 @@ enum punit_power_well { #define EDP_PSR_BASE(dev) (IS_HASWELL(dev) ? 0x64800 : 0x6f800) #define EDP_PSR_CTL(dev) (EDP_PSR_BASE(dev) + 0) #define EDP_PSR_ENABLE (1<<31) +#define BDW_PSR_SINGLE_FRAME (1<<30) #define EDP_PSR_LINK_DISABLE (0<<27) #define EDP_PSR_LINK_STANDBY (1<<27) #define EDP_PSR_MIN_LINK_ENTRY_TIME_MASK (3<<25) |