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| author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-06-25 22:01:48 +0300 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-07-10 22:04:45 +0200 |
| commit | 114fe4885721d985907fbfb0d1a0c1c6676b4543 (patch) | |
| tree | 0032235c208aa5f98b6f55ea96aae7fa4e625d52 /drivers/gpu/drm/i915/i915_reg.h | |
| parent | 7ca1ac135bc4d566e460230133ff959bb1bfcf88 (diff) | |
| download | op-kernel-dev-114fe4885721d985907fbfb0d1a0c1c6676b4543.zip op-kernel-dev-114fe4885721d985907fbfb0d1a0c1c6676b4543.tar.gz | |
drm/i915: Clean up WRPLL/SPLL #defines
Luckily the bit definitions match, but it's still confusing
to use one when handling the other. So sprinkle some OCD over
the #defines to make them match and use the right version in
each place.
Maybe we should unify these definitions completely, but that
can always be done sometime in the future.
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index a2117a9..d829dfc 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -5922,9 +5922,10 @@ enum punit_power_well { #define WRPLL_CTL1 0x46040 #define WRPLL_CTL2 0x46060 #define WRPLL_PLL_ENABLE (1<<31) -#define WRPLL_PLL_SELECT_SSC (0x01<<28) -#define WRPLL_PLL_SELECT_NON_SSC (0x02<<28) -#define WRPLL_PLL_SELECT_LCPLL_2700 (0x03<<28) +#define WRPLL_PLL_SSC (1<<28) +#define WRPLL_PLL_NON_SSC (2<<28) +#define WRPLL_PLL_LCPLL (3<<28) +#define WRPLL_PLL_REF_MASK (3<<28) /* WRPLL divider programming */ #define WRPLL_DIVIDER_REFERENCE(x) ((x)<<0) #define WRPLL_DIVIDER_REF_MASK (0xff) |
