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author | Shaohua Li <shaohua.li@intel.com> | 2009-04-07 11:02:28 +0800 |
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committer | Eric Anholt <eric@anholt.net> | 2009-05-14 16:00:26 -0700 |
commit | 0ba0e9e1f173a59ba402a253d356612c821b7a14 (patch) | |
tree | 942e1852a2beb7b0ad020c935a4fd18d3d750553 /drivers/gpu/drm/i915/i915_reg.h | |
parent | 13f4c435ebf2a7c150ffa714f3b23b8e4e8cb42f (diff) | |
download | op-kernel-dev-0ba0e9e1f173a59ba402a253d356612c821b7a14.zip op-kernel-dev-0ba0e9e1f173a59ba402a253d356612c821b7a14.tar.gz |
drm/i915: workaround IGD i2c bus issue in kernel side (v2)
In IGD, DPCUNIT_CLOCK_GATE_DISABLE bit should be set, otherwise i2c
access will be wrong.
v2: Disable CLOCK_GATE_DISABLE bit after bit bashing as suggested by Eric.
Signed-off-by: Shaohua Li <shaohua.li@intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
-rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 5211947..15da44c 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -526,6 +526,7 @@ #define DPLLA_INPUT_BUFFER_ENABLE (1 << 0) #define D_STATE 0x6104 #define CG_2D_DIS 0x6200 +#define DPCUNIT_CLOCK_GATE_DISABLE (1 << 24) #define CG_3D_DIS 0x6204 /* |