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| author | Rafael Antognolli <rafael.antognolli@intel.com> | 2017-12-15 16:11:17 -0800 |
|---|---|---|
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2017-12-19 13:43:26 -0800 |
| commit | a2b16588578f8edd0e39c7a6554b047b13e8ca79 (patch) | |
| tree | 3caca70639014b73e4fa1ea8bb95245bb3da7011 /drivers/gpu/drm/i915/i915_reg.h | |
| parent | 01ab0f9216070f3337b3da8953a259072f5bd4f7 (diff) | |
| download | op-kernel-dev-a2b16588578f8edd0e39c7a6554b047b13e8ca79.zip op-kernel-dev-a2b16588578f8edd0e39c7a6554b047b13e8ca79.tar.gz | |
drm/i915: Implement WaDisableEarlyEOT.
There seems to be another clock gating issue which the workaround is
described as:
"WA: Set 0xE4F0[1] = 1 to disable Early EOT of thread."
Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20171216001117.14232-2-rafael.antognolli@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 759c600..268bbd0 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -8146,6 +8146,7 @@ enum { #define PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE (1<<8) #define STALL_DOP_GATING_DISABLE (1<<5) #define THROTTLE_12_5 (7<<2) +#define DISABLE_EARLY_EOT (1<<1) #define GEN7_ROW_CHICKEN2 _MMIO(0xe4f4) #define GEN7_ROW_CHICKEN2_GT2 _MMIO(0xf4f4) |
