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| author | Paulo Zanoni <paulo.r.zanoni@intel.com> | 2012-02-03 17:47:15 -0200 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-02-10 17:44:38 +0100 |
| commit | 5f7f726d2caf1e51a39872e5a30b6984235d388e (patch) | |
| tree | 37c8f4d3f19124984f5bbb6a3e6e7c5f47931577 /drivers/gpu/drm/i915/i915_reg.h | |
| parent | 75c13993db592343bda1fd62f2555fea037d56bd (diff) | |
| download | op-kernel-dev-5f7f726d2caf1e51a39872e5a30b6984235d388e.zip op-kernel-dev-5f7f726d2caf1e51a39872e5a30b6984235d388e.tar.gz | |
drm/i915: set interlaced bits for TRANSCONF
I'm not sure why they are needed (I didn't notice any difference in my
tests), but these bits are in our documentation and they are also set by
the Windows driver.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 7eabdf0..7b4477c 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -3362,7 +3362,9 @@ #define TRANS_FSYNC_DELAY_HB4 (3<<27) #define TRANS_DP_AUDIO_ONLY (1<<26) #define TRANS_DP_VIDEO_AUDIO (0<<26) +#define TRANS_INTERLACE_MASK (7<<21) #define TRANS_PROGRESSIVE (0<<21) +#define TRANS_INTERLACED (3<<21) #define TRANS_8BPC (0<<5) #define TRANS_10BPC (1<<5) #define TRANS_6BPC (2<<5) |
