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author | Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> | 2017-01-27 11:02:30 +0200 |
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committer | Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> | 2017-01-30 10:25:13 +0200 |
commit | 9751bafc43d599262d9de7e6d988804dc5f5d4aa (patch) | |
tree | fb4511c9ae47816199ddd003328105204e034d59 /drivers/gpu/drm/i915/i915_pci.c | |
parent | 2fcb206654e8b3826424ffa7ef65bd74cc65ff16 (diff) | |
download | op-kernel-dev-9751bafc43d599262d9de7e6d988804dc5f5d4aa.zip op-kernel-dev-9751bafc43d599262d9de7e6d988804dc5f5d4aa.tar.gz |
drm/i915/glk: Program pipe gamma and degamma tables
The gamma tables in Geminilake were changed. There is no split-gamma
mode. Instead, there is a dedicated degamma table that is enabled
whenever pipe CSC is enabled.
The dedicated gamma table has 16 bit precision but doesn't support
separate channels. Since that doesn't match the per-channel format of
the degamma LUT property, for now only a linear table is loaded and the
property ignored.
v2: Remove empty line. (Ville)
Reuse broadwell code. (Ville)
v3: Don't write PIPE_CSC_MODE. (Ville)
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170127090230.20302-1-ander.conselvan.de.oliveira@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_pci.c')
-rw-r--r-- | drivers/gpu/drm/i915/i915_pci.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index ecb487b..df2051b 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -403,6 +403,7 @@ static const struct intel_device_info intel_geminilake_info = { .platform = INTEL_GEMINILAKE, .is_alpha_support = 1, .ddb_size = 1024, + .color = { .degamma_lut_size = 0, .gamma_lut_size = 1024 } }; static const struct intel_device_info intel_kabylake_info = { |