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authorChris Wilson <chris@chris-wilson.co.uk>2012-07-20 12:41:01 +0100
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-07-25 18:23:52 +0200
commit0201f1ecf4b81f08799b1fb9c8cdf1125b9b78a6 (patch)
tree51b722aace265466c15f884500542b1e54aa25e5 /drivers/gpu/drm/i915/i915_irq.c
parente5f1d962a8e4c5fd6b3a8155c0f7a40b0bff4a96 (diff)
downloadop-kernel-dev-0201f1ecf4b81f08799b1fb9c8cdf1125b9b78a6.zip
op-kernel-dev-0201f1ecf4b81f08799b1fb9c8cdf1125b9b78a6.tar.gz
drm/i915: Replace the pending_gpu_write flag with an explicit seqno
As we always flush the GPU cache prior to emitting the breadcrumb, we no longer have to worry about the deferred flush causing the pending_gpu_write to be delayed. So we can instead utilize the known last_write_seqno to hopefully minimise the wait times. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_irq.c')
-rw-r--r--drivers/gpu/drm/i915/i915_irq.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 566f61b..41ed41d 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -950,7 +950,8 @@ static void capture_bo(struct drm_i915_error_buffer *err,
{
err->size = obj->base.size;
err->name = obj->base.name;
- err->seqno = obj->last_rendering_seqno;
+ err->rseqno = obj->last_read_seqno;
+ err->wseqno = obj->last_write_seqno;
err->gtt_offset = obj->gtt_offset;
err->read_domains = obj->base.read_domains;
err->write_domain = obj->base.write_domain;
@@ -1045,7 +1046,7 @@ i915_error_first_batchbuffer(struct drm_i915_private *dev_priv,
if (obj->ring != ring)
continue;
- if (i915_seqno_passed(seqno, obj->last_rendering_seqno))
+ if (i915_seqno_passed(seqno, obj->last_read_seqno))
continue;
if ((obj->base.read_domains & I915_GEM_DOMAIN_COMMAND) == 0)
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