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author | Ben Widawsky <ben@bwidawsk.net> | 2013-04-05 13:12:43 -0700 |
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committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-04-08 20:53:05 +0200 |
commit | 88a2b2a32d71aad6d8dcd843294b00a204faa66b (patch) | |
tree | ec91711acdc5dd1e233293bdd7f86af615ed4fa5 /drivers/gpu/drm/i915/i915_gem.c | |
parent | ab5c608b2d96c8db80b9c7df072f18f3a4226b55 (diff) | |
download | op-kernel-dev-88a2b2a32d71aad6d8dcd843294b00a204faa66b.zip op-kernel-dev-88a2b2a32d71aad6d8dcd843294b00a204faa66b.tar.gz |
drm/i915: Don't wait for PCH on reset
BIOS should be setting this, but in case it doesn't...
v2: Define the bits we actually want to clear (Jesse)
Make it an RMW op (Jesse)
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gem.c')
-rw-r--r-- | drivers/gpu/drm/i915/i915_gem.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 911bd40..74c5601 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -3992,6 +3992,12 @@ i915_gem_init_hw(struct drm_device *dev) if (IS_HASWELL(dev) && (I915_READ(0x120010) == 1)) I915_WRITE(0x9008, I915_READ(0x9008) | 0xf0000); + if (HAS_PCH_NOP(dev)) { + u32 temp = I915_READ(GEN7_MSG_CTL); + temp &= ~(WAIT_FOR_PCH_FLR_ACK | WAIT_FOR_PCH_RESET_ACK); + I915_WRITE(GEN7_MSG_CTL, temp); + } + i915_gem_l3_remap(dev); i915_gem_init_swizzling(dev); |