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author | Maarten Lankhorst <maarten.lankhorst@linux.intel.com> | 2015-12-10 12:33:57 +0100 |
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committer | Maarten Lankhorst <maarten.lankhorst@linux.intel.com> | 2015-12-22 13:42:27 +0100 |
commit | 565602d7501a3e83580289d7d6da9b15838cfbe3 (patch) | |
tree | d5091e8a5c79c6cc28625ba92024c59cd0939353 /drivers/gpu/drm/i915/i915_drv.h | |
parent | bf8a0af0cc9f9de9e54aefd1afd8c23b91809e41 (diff) | |
download | op-kernel-dev-565602d7501a3e83580289d7d6da9b15838cfbe3.zip op-kernel-dev-565602d7501a3e83580289d7d6da9b15838cfbe3.tar.gz |
drm/i915: Do not acquire crtc state to check clock during modeset, v4.
Parallel modesets are still not allowed, but this will allow updating
a different crtc during a modeset if the clock is not changed.
Additionally when all pipes are DPMS off the cdclk will be lowered
to the minimum allowed.
Changes since v1:
- Add dev_priv->active_crtcs for tracking which crtcs are active.
- Rename min_cdclk to min_pixclk and move to dev_priv.
- Add a active_crtcs mask which is updated atomically.
- Add intel_atomic_state->modeset which is set on modesets.
- Commit new pixclk/active_crtcs right after state swap.
Changes since v2:
- Make the changes related to max_pixel_rate calculations more readable.
Changes since v3:
- Add cherryview and missing WARN_ON to readout.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.h')
-rw-r--r-- | drivers/gpu/drm/i915/i915_drv.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 1d8279c..73da52a 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1819,8 +1819,13 @@ struct drm_i915_private { struct intel_pipe_crc pipe_crc[I915_MAX_PIPES]; #endif + /* dpll and cdclk state is protected by connection_mutex */ int num_shared_dpll; struct intel_shared_dpll shared_dplls[I915_NUM_PLLS]; + + unsigned int active_crtcs; + unsigned int min_pixclk[I915_MAX_PIPES]; + int dpio_phy_iosf_port[I915_NUM_PHYS_VLV]; struct i915_workarounds workarounds; |