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| author | Imre Deak <imre.deak@intel.com> | 2015-10-28 23:59:06 +0200 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2015-11-12 17:31:10 +0200 |
| commit | f514c2d8428584431fc0a3b64a4c3c7b8df3e3ae (patch) | |
| tree | 96253e1b1cf84016649eb6d024946dbc9b51adfc /drivers/gpu/drm/i915/i915_drv.c | |
| parent | 15e72c1fc118731970ab1a94fb894039b8abfff4 (diff) | |
| download | op-kernel-dev-f514c2d8428584431fc0a3b64a4c3c7b8df3e3ae.zip op-kernel-dev-f514c2d8428584431fc0a3b64a4c3c7b8df3e3ae.tar.gz | |
drm/i915/gen9: flush DMC fw loading work during system suspend
Currently during system s/r we enable/disable DC6, so before we do so
make sure that the firmware loading is complete.
Note that whether we need to enable DC6 for S3/S4 is still open. At
least the firmware program is lost during S3 and we need to reprogram it
after resuming. Until this is clarified we keep the current behavior and
enable/disable DC6.
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Tested-by: Daniel Stone <daniels@collabora.com> # SKL
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446069547-24760-13-git-send-email-imre.deak@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.c')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_drv.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 37319b0..858d58c 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -693,6 +693,9 @@ static int i915_drm_suspend(struct drm_device *dev) intel_display_set_init_power(dev_priv, false); + if (HAS_CSR(dev_priv)) + flush_work(&dev_priv->csr.work); + return 0; } |
