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authorVille Syrjälä <ville.syrjala@linux.intel.com>2015-08-27 23:56:08 +0300
committerDaniel Vetter <daniel.vetter@ffwll.ch>2015-09-02 16:57:03 +0200
commit08d8a232aa5e145f995a98ac7f3de55e2fe6832b (patch)
tree19c05bd04f4334063277a47ad1cd7167b126048b /drivers/gpu/drm/i915/i915_drv.c
parent74c0b395fce4c807a49c404fb59462b22069b001 (diff)
downloadop-kernel-dev-08d8a232aa5e145f995a98ac7f3de55e2fe6832b.zip
op-kernel-dev-08d8a232aa5e145f995a98ac7f3de55e2fe6832b.tar.gz
drm/i915: Reinitialize HPD after runtime D3
Runtime suspends disabled all interrupts, so in order to get them back fully we need to also do the HPD irq setup on runtime resume. Except on VLV/CHV where the display interrupt initialization is part of the display power well powerup. Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.c')
-rw-r--r--drivers/gpu/drm/i915/i915_drv.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 4737d15..bdec64c 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1555,6 +1555,15 @@ static int intel_runtime_resume(struct device *device)
gen6_update_ring_freq(dev);
intel_runtime_pm_enable_interrupts(dev_priv);
+
+ /*
+ * On VLV/CHV display interrupts are part of the display
+ * power well, so hpd is reinitialized from there. For
+ * everyone else do it here.
+ */
+ if (!IS_VALLEYVIEW(dev_priv))
+ intel_hpd_init(dev_priv);
+
intel_enable_gt_powersave(dev);
if (ret)
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