diff options
| author | Gabriel Feceoru <gabriel.feceoru@intel.com> | 2016-01-22 13:28:45 +0200 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2016-02-10 08:29:34 +0100 |
| commit | 8c448cadd4dd1bb3a8f34a93eaceb464d6e7a1db (patch) | |
| tree | a24fb7cb9f7c5f48b8c5bf3f68c75dbcc501474c /drivers/gpu/drm/i915/i915_dma.c | |
| parent | da3b891b0fb88605bb2d16adaf1ef2a1f16403ba (diff) | |
| download | op-kernel-dev-8c448cadd4dd1bb3a8f34a93eaceb464d6e7a1db.zip op-kernel-dev-8c448cadd4dd1bb3a8f34a93eaceb464d6e7a1db.tar.gz | |
drm/i915: Handle PipeC fused off on IVB/HSW/BDW
Some Gen7/8 production parts may have the Display Pipe C fused off.
In this case, the display hardware will prevent the enable bit in
PIPE_CONF register (for Pipe C) from being set to 1.
Fixed by adjusting pipe_count to reflect this.
v2: Rename HSW_PIPE_C_DISABLE to IVB_PIPE_C_DISABLE as it already exists
on ivybridge (Ville)
v3: Remove unnecessary MMIO read, correct the description (Damien)
v4: Be more specific in description (Patrick)
Signed-off-by: Gabriel Feceoru <gabriel.feceoru@intel.com>
Reviewed-by: Patrik Jakobsson <patrik.jakobsson@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1453462125-21519-1-git-send-email-gabriel.feceoru@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_dma.c')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_dma.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c index a42eb58..35c2b33 100644 --- a/drivers/gpu/drm/i915/i915_dma.c +++ b/drivers/gpu/drm/i915/i915_dma.c @@ -808,6 +808,9 @@ static void intel_device_info_runtime_init(struct drm_device *dev) !(sfuse_strap & SFUSE_STRAP_FUSE_LOCK))) { DRM_INFO("Display fused off, disabling\n"); info->num_pipes = 0; + } else if (fuse_strap & IVB_PIPE_C_DISABLE) { + DRM_INFO("PipeC fused off\n"); + info->num_pipes -= 1; } } else if (info->num_pipes > 0 && INTEL_INFO(dev)->gen == 9) { u32 dfsm = I915_READ(SKL_DFSM); |
